Array substrate and display screen
A technology for array substrates and display areas, which is applied to semiconductor devices, electrical components, circuits, etc., can solve problems such as poor display effects on display screens, and achieve the effects of avoiding short circuits, reducing adverse effects, and improving yields
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Embodiment 1
[0039] Exemplarily, see Figure 2-Figure 4 Embodiment 1 of the present invention provides an array substrate. The array substrate includes a display area 10 and a wiring area located on one side of the display area 10. The wiring area includes a laminated upper wiring layer 56 and a lower wiring layer. The wiring layer 56 and the underlying wiring layer are separated by an insulating layer group. The insulating layer group includes an insulating sublayer and an insulating organic compensation body 57 formed on the insulating sublayer. The insulating organic compensation body 57 is used to compensate at least part of the upper surface of the insulating sublayer sunken.
[0040] Since the upper wiring layer 56 is formed above the insulating layer group, when there are defects such as depressions or gaps on the upper surface of the insulating layer group, the display effect of the display screen will be affected. In this embodiment, the insulating layer group includes an insulat...
Embodiment 2
[0073] Embodiment 2 of the present invention provides a display screen, which includes a chip 40 and the above-mentioned array substrate. Further, the chip 40 is located on the same side of the display area 10 of the array substrate as the bending area 20 , pad area 30 and fan-out area 50 of the array substrate, and the chip 40 is electrically connected to the display area 10 . Such as figure 2 As shown, the chip 40 is located on the side where the pad region 30 is located, and the chip 40 is electrically connected to the first wiring sublayer 51 , the second wiring sublayer 53 and the upper wiring layer 56 .
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