A wiring method and a testing method for wiring resources of an FPGA

A wiring method and testing method technology, applied in special data processing applications, instruments, electrical digital data processing and other directions, can solve the problems of long testing time of FPGA wiring resources and unbalanced utilization of FPGA resources, so as to shorten the FPGA testing time and , the effect of reducing the number of

Active Publication Date: 2019-05-28
SHANGHAI ANLOGIC INFOTECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The disadvantage of the existing FPGA wiring resource testing method is that the utilization rate of FPGA resources is unbalanced, so the number of test pats required for wiring resource testing is relatively large, and the FPGA wiring resource testing time is relatively long

Method used

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  • A wiring method and a testing method for wiring resources of an FPGA
  • A wiring method and a testing method for wiring resources of an FPGA
  • A wiring method and a testing method for wiring resources of an FPGA

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Embodiment Construction

[0049] In the following description, many technical details are proposed in order to enable readers to better understand the application. However, those skilled in the art can understand that the technical solutions claimed in this application can be realized even without these technical details and various changes and modifications based on the following implementation modes.

[0050] Explanation of some concepts:

[0051] 1.FPGA: Field Programmable Gate Array, Field Programmable Logic Array. It emerged as a semi-custom circuit in the field of application-specific integrated circuits, which not only solves the shortcomings of full-custom circuits, but also overcomes the shortcomings of the limited number of gates in the original programmable logic device.

[0052] 2.PLB: Programmable Logic Block, programmable logic module. Is the basic unit of FPGA, such as Figure 7 As shown, it includes a wiring switch array RSB and a logic unit PFB.

[0053] 3. RSB: Routing Switch Box....

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Abstract

The invention relates to an integrated circuit test, and discloses a wiring method and a testing method of wiring resources of an FPGA. The wiring method specifically comprises the following steps ofselecting a direction; executing the wiring process of a unit step length sequentially from each row or each column of the starting wiring unit to each row or each column of the ending wiring unit, and executing the wiring process of the unit step length once from each row or each column of the starting wiring unit in a direction opposite to the selected direction. The testing method is used for testing the distributed tested line segments on the basis of the wiring method. According to the embodiment of the invention, the existing FPGA logic resources can be utilized in a balanced manner, thewiring channels are tested as much as possible in one test pad, the number of test pads required by FPGA wiring resource testing is reduced, the FPGA testing time is shortened, and the test pad development time is shortened.

Description

technical field [0001] The present application relates to the field of integrated circuit testing, in particular to a routing technology and testing technology of FPGA routing resources. Background technique [0002] The wiring resources connect all units inside the FPGA, and the length and process of the connection determine the driving capability and transmission speed of the signal on the connection. There are abundant wiring resources inside the FPGA chip. In practice, designers do not need to directly select wiring resources. The placer and router can automatically select wiring resources according to the topology and constraints of the input logic netlist to connect each module unit. The wiring resources are An important part of the FPGA, the connectivity of the FPGA's routing resources directly affects the specific functions of the FPGA, so the testing of the FPGA's routing resources is particularly important. [0003] The disadvantage of the existing FPGA routing re...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 郑莉
Owner SHANGHAI ANLOGIC INFOTECH CO LTD
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