Circuit of multi-bus reconfigurable processor chip

Abstract

The invention belongs to a computer hardware technology, and relates to a circuit structure of a multi-bus reconfigurable processor chip. The circuit comprises an FPGA core, a bus, an FPGA core interface and an FPGA core loading circuit. The FPGA core is programmable, the processor accesses the FPGA core by means of the bus and the FPGA core interface, and the user loads an independently designedlogic circuit into the FPGA core by means of the FPGA core loading circuit. The circuit of the multi-bus reconfigurable processor chip is provided.

Description

technical field [0001] The invention belongs to computer hardware technology and relates to a circuit structure of a multi-bus reconfigurable processor chip. Background technique [0002] The flight control system of the airborne computer needs to be equipped with a high-performance processor, embedded with a large-capacity FPGA, which can realize function customization, and at the same time realize the communication between the flight control computer and peripherals through 429, 422, 1553B and other interfaces. The required processor chip. Contents of the invention [0003] The purpose of the present invention is to provide a multi-bus reconfigurable processor chip circuit. [0004] Technical solution of the present invention: a multi-bus reconfigurable processor chip circuit, characterized in that: the circuit includes an FPGA core, a bus, an FPGA core interface and an FPGA core loading circuit, and the FPGA core is programmable, processing The device accesses the FPG...

AI Technical Summary

Problems solved by technology

[0002] The flight control system of the airborne computer needs to be equipped with a high-performance processor, embedded with a large-capacity FPGA, which can realize function customization, and at the same time realize the communication between the flight control computer and peripherals through 429, 422, 1553B and other interfaces. The required processor chip

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