Packaging method for multi-pin semiconductor products
A packaging method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as residual burrs in chip products
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Embodiment 1
[0041] The existing semiconductor packaging process generally includes the following process steps: a chip attaching step, a wire bonding step, a molding step, an electroplating step, and a separation molding step.
[0042] It can be seen from the above process that the multi-pin semiconductor device is directly obtained after the lead frame is cut and separated. However, for multi-pin products, due to the large number of pins and the small gap between adjacent pins, metal burrs are likely to be generated when cutting ribs due to the large number of pins. If these metal burrs are If left on the chip unit, there will be a risk of short circuit when the user uses it later.
[0043] In order to solve the above technical problems, the present invention provides a new packaging method, the packaging method by adding a rib cutting step and a deburring step after the molding step, that is, cutting the ribs on the part of the lead frame during molding , such as the connecting ribs be...
Embodiment 2
[0057] Aiming at the defect that the lead frame of the existing multi-pin semiconductor product has many single rows and asymmetrical design, which leads to low utilization rate of packaging materials, this embodiment provides a new lead frame of the multi-pin semiconductor product, which will lead The frame expands from a single row to multiple rows, with a matrix integrated structure and symmetrical design, which can significantly improve the utilization rate of packaging materials and improve the production efficiency of semiconductor products.
[0058] The lead frame includes a frame and chip unit groups, and each chip unit group includes two chip units. Each chip unit includes a pin area and a heat dissipation area. The heat dissipation areas of two chip units in the same chip unit group are connected by a first connecting rib. At least one row of chip unit groups is arranged along the length direction of the frame, and each row of chip unit groups It includes a matrix-ty...
Embodiment 3
[0076] Based on the lead frame of the multi-pin semiconductor product provided by the present invention, the corresponding rib cutting step and separation step are specifically:
[0077] Such as Figure 4 As shown, wherein, the rib cutting step is mainly to process the pins of each chip unit in the lead frame, that is, to cut off various connecting ribs connected to the pins of each chip unit. Such as Figure 4 As shown, specifically:
[0078] First cut off the fourth connecting rib between the chip unit groups in adjacent columns; for example figure 2 The fourth connecting rib 44 described in; then cut off the third connecting rib between adjacent column chip unit groups; such as figure 2 The third connecting rib 43 shown in ; finally cut off the rubber retaining rib between the pins of each chip unit, as image 3 The rubber blocking rib 7 shown in . In addition, when cutting off the rubber ribs, cut off the rubber ribs A and B first, and then cut off the rubber ribs C...
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