A pre-emphasis debugging system and method

Abstract

A pre-emphasis debugging system and method, related to the field of high-speed serial data communication, the system includes a PCB and an FPGA chip, each sending port of the FPGA chip is connected to a sending end radio frequency coaxial head, and the FPGA chip also includes PRBS symbol generation The device is used to generate different types of PRBS code streams sent from the sending port; the RF coaxial head of the receiving end is connected to the RF coaxial head of each sending end through coaxial cables, and is also connected to the receiving port; the PRBS symbol checker Check the PRBS code stream received by the receiving port and calculate the bit error rate; the pre-emphasis management module generates a set of pre-emphasis configuration parameters each time and transmits it to the sending port to start the PRBS symbol generator; Compared with the last bit error rate, save the same or smaller bit error rate and the corresponding pre-emphasis configuration parameters. The invention does not need an external testing instrument, and can automatically test the best pre-emphasis parameters of the sending end without adding redundant lines.

Description

technical field [0001] The invention relates to the field of high-speed serial data communication, in particular to a pre-emphasis debugging system and method. Background technique [0002] In a high-speed data communication system, an FPGA (Field Programmable Gate Array, Field Programmable Gate Array) is usually used as a high-speed data processing unit, and the FPGA transceiver is an interface unit for high-speed data reception and transmission. With the increase of the signal rate, the skin effect of the high-speed signal and the dielectric loss of the transmission line cause the signal to be greatly damaged during the transmission process. In order to obtain a better waveform at the receiving terminal, it is necessary to compensate the damaged signal. . [0003] A compensation technique commonly used at the sending end includes a pre-emphasis technique. By adjusting the pre-emphasis parameters at the sending end of the FPGA transceiver, the loss of the high-speed signa...

AI Technical Summary

Problems solved by technology

This method has disadvantages when using it. It is necessary to make a test line that is the same as the signal link of the FPGA sending end during PCB design. When using a network analyzer, the pre-designed test line is tested, so there is redundancy on the PCB. The line increases the area of ​​the PCB, and if there are multiple sending ends, it is not accurate to refer to one S parameter because of the different wiring.

[0005] At the same time, the above two commonly used methods require the use of external test instruments to assist in the analysis, which increases the cost and complexity of the test

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