Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Excitation generation device, chip verification device and chip verification system

A technology for generating devices and verifying devices, which is applied in the field of verification, can solve problems such as difficulty in improving the coverage rate, and achieve the effect of improving the coverage rate and improving the efficiency of chip verification

Active Publication Date: 2019-07-09
CAMBRICON TECH CO LTD
View PDF6 Cites 10 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] Based on this, it is necessary to provide a stimulus generation device to generate incentives to improve the efficiency of chip verification for the problem that the coverage rate is difficult to increase after it reaches a certain value.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Excitation generation device, chip verification device and chip verification system
  • Excitation generation device, chip verification device and chip verification system
  • Excitation generation device, chip verification device and chip verification system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0053]In order to make the purpose, technical solution and technical effect of the present invention clearer, specific embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. It should be clear that "first", "second", etc. in this embodiment are only used to distinguish the described objects, and do not have any sequence or technical meaning.

[0054] figure 1 A schematic structural diagram of an excitation generating device 100 proposed in one of the embodiments is shown. The incentive generation device 100 includes: a random constraint file generation module 110, a template library 120, an analysis module 130,...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to an excitation generation device, a chip verification device, a chip verification system. The excitation generation device comprises a random constraint file generation module,which is used for randomly generating a constraint file according to information to be verified of a chip; a template library used for storing the constraint file; an analysis module used for analyzing the constraint file to obtain a first constraint condition; a condition adjustment module used for adjusting a first constraint condition in the constraint file to obtain a second constraint condition; and an excitation generation module used for generating verification excitation according to the first constraint condition or the second constraint condition. According to the excitation generation device, more diverse excitation generation mechanisms can be provided, more types of verification excitation can be obtained, comprehensive chip verification is facilitated, the coverage rate canbe rapidly increased, and the chip verification efficiency is improved.

Description

technical field [0001] The invention relates to the technical field of verification, in particular to an incentive generation device, a chip verification device and a system. Background technique [0002] One of the purposes of chip verification is to detect bugs in the programs running on the chip. During chip verification, the RTL emulator (Register Transfer level simulation) and the verification model of the chip verification system execute the verification stimulus generated by the stimulus generation device, output the execution result, and the processor of the chip verification system obtains the coverage data according to the output result, and Determine whether the chip verification is terminated according to whether the obtained coverage data meets expectations. Coverage data is a quantitative indicator used to evaluate the verification process and results. [0003] At present, the mechanisms that generate incentives when using the chip verification system for chi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/33G06F30/398G06F2111/04
Inventor 不公告发明人
Owner CAMBRICON TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com