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Exception recovery method and device for heterogeneous hybrid memory system

A hybrid memory and exception recovery technology, applied in non-redundancy-based fault handling, response error generation, etc., can solve the problem that the abnormal recovery process is difficult to achieve development costs, and achieve the effect of reducing development costs

Inactive Publication Date: 2019-10-25
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the BIOS is used to control and guide the entire restart process. Due to hardware limitations or related BIOS (Basic Input Output System, Basic Input Output System) logic limitations, it is sometimes difficult to control the abnormal recovery process through the BIOS or the corresponding development costs are very high. high

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  • Exception recovery method and device for heterogeneous hybrid memory system
  • Exception recovery method and device for heterogeneous hybrid memory system

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Embodiment Construction

[0041] The core of the present application is to provide a heterogeneous hybrid memory system abnormal recovery method, which can reduce the development cost of heterogeneous hybrid memory system abnormal recovery. Another core of the present application is to provide a heterogeneous hybrid memory system abnormal recovery device, equipment and computer-readable storage medium.

[0042] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of prote...

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Abstract

The application provides an exception recovery method for a heterogeneous hybrid memory system whichi comprises the steps that when an IPMI detects that the heterogeneous hybrid memory system is abnormally powered off, controlling a BIOS and a first FPGA to be started; sending an abnormal data clearing command to the NVM, and constructing a heterogeneous hybrid memory by utilizing the DRAM memoryinformation of the first FPGA and the NVM memory information after the abnormal data is cleared; and controlling the BIOS to execute a starting operation of the heterogeneous hybrid memory system corresponding to the heterogeneous hybrid memory. When an IPMI detects abnormal power failure of a heterogeneous hybrid memory system, a BIOS and a first FPGA are controlled to be started, and after abnormal data is removed, DRAM memory information and NVM memory information of the first FPGA are utilized to construct a heterogeneous hybrid memory. Therefore, the method avoids limitation of hardware or limitation of related BIOS logic in related technologies, and can reduce the development cost of exception recovery of the heterogeneous hybrid memory system. The invention further provides a heterogeneous hybrid memory system exception recovery device and apparatus and a computer readable storage medium.

Description

technical field [0001] The present application relates to the field of heterogeneous hybrid memory system abnormal recovery, and in particular to a heterogeneous hybrid memory system abnormal recovery method, device, equipment and computer-readable storage medium. Background technique [0002] The heterogeneous hybrid memory system needs to control NVM (Non-Volatile Memory, non-volatile memory) to complete data write-back before power failure to protect data in the memory. If an abnormal power failure occurs, a special program processing flow is required for abnormal recovery. At present, the BIOS is used to control and guide the entire restart process. Due to hardware limitations or related BIOS (Basic Input Output System, Basic Input Output System) logic limitations, it is sometimes difficult to control the abnormal recovery process through the BIOS or the corresponding development costs are very high. high. [0003] Therefore, how to reduce the development cost of abnor...

Claims

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Application Information

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IPC IPC(8): G06F11/07
CPCG06F11/073G06F11/0793
Inventor 王龙飞
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD