Power device double-strip stamping die layout method
A technology for stamping dies and power devices, which is applied in the field of double-strand stamping die layout for power devices, can solve problems such as uneven material strips, collapse angles, and reduced service life of power devices, so as to avoid serious flashing, reduce strength, reduce The effect of a small tread
Active Publication Date: 2019-11-19
SICHUAN JINWAN ELECTRONICS
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Problems solved by technology
However, the existing power device strips are prone to problems such as unevenness, collapse, and poor finish during the stamping process, which affects the stability of the power device's plastic packaging and use, and greatly reduces the service life of the power device. , so it is necessary to solve the problems of unevenness, collapse angle and poor precision of the power device strip
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[0029] The present invention will be described in further detail below through specific implementation examples and in conjunction with the accompanying drawings.
[0030] figure 1 It shows a power device double-strip stamping die layout method provided by the present invention, which specifically includes the following steps:
[0031] S1: Select the appropriate metal strip according to the product prefabricated parts to be prepared, punch out the punching hole 1 on the metal strip through the punching die, and pre-puncher the positioning hole 1 and the slit square hole at the same time ; When the metal strip enters the punching die, the punching hole 1 is immediately punched, effectively avoiding the conflict of the metal strip during subsequent processing of high-precision Gong Wei, so that the metal strip is more accurate in the subsequent processing process; at the same time, in the Immediately punch the positioning hole 1 after the metal strip enters the punching die, so...
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The invention discloses a power device double-strip stamping die layout method, and relates to the field of semiconductor manufacturing processes. The power device double-strip stamping die layout method comprises the following steps of 1, selecting an appropriate metal material strip according to a product prefabricated member required to be manufactured, punching a glue punching hole on the metal material strip through a punching die, and simultaneously pre-punching a first positioning hole and a divided square hole; 2, on the basis of the step 1, pre-punching a slide, a connecting square hole, a first radiating fin, a second radiating fin and a first inner lead on the metal material strip by using the punching die; and 3, on the basis of the step 2, stamping and forming a first dovetailand a second dovetail on the metal material strip by using the stamping die. According to the method, the power device material strip is not only enabled to be smoother in the stamping process, but also effectively prevented from collapsing in the stamping process, so that the precision of the stamped and formed power device material strip is higher, the quality of a finally machined and formed power device is better, and the service life of the power device is longer.
Description
technical field [0001] The invention relates to the field of semiconductor manufacturing technology, in particular to a layout method for a double-strip stamping die of a power device. Background technique [0002] Power devices are the basic electronic components for energy control and conversion in power electronic systems. The continuous development of power electronics technology has opened up a wide range of application fields for semiconductor power, and the controllable characteristics of semiconductor power devices determine the efficiency and volume of power electronic systems. and weight, the first common thyristor for industrial use was developed by General Electric Company of the United States in 1957, which marked the birth of modern power electronics technology. field. Since the birth of vertical double-diffused transistor power devices, electronic power has developed rapidly. Due to its unique characteristics of high input impedance, low driving power, high s...
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IPC IPC(8): B21D37/08B21D35/00H01L23/28
CPCB21D35/001B21D35/003B21D37/08H01L23/28
Inventor 王锋涛黄斌谢锐周开友宋佳骏黄重钦
Owner SICHUAN JINWAN ELECTRONICS