Manufacturing method of mask plate and mask plate

Abstract

The invention provides a manufacturing method of a mask plate, which comprises the following steps: providing a substrate, and forming a main pattern and a cutting channel forming region arranged at the periphery of a main pattern region on the substrate; and forming an overlay alignment mark and a redundant graph in a cutting channel graph region, wherein the redundant graph surrounds the overlayalignment mark. Under the condition that the overlay alignment mark is arranged, the redundant graph is additionally arranged in the cutting channel forming region of the mask plate; the overlay alignment mark and the redundant graph can be subsequently transferred to the surface of the wafer together; according to the invention, the etching stress on the surface of the wafer when the wafer is etched to obtain the dense lines corresponding to the overlay alignment marks is dispersed, so that the breakage of the dense lines in the etching process is avoided, the damage to the overlay alignmentmarks is reduced, the etching stability is improved, the measurement noise of overlay alignment is reduced, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a mask and the mask. Background technique [0002] As the process nodes of semiconductor manufacturing continue to advance, the critical dimensions continue to shrink, which has exceeded the physical limit of the current mainstream lithography process. In the manufacture of process nodes of 38nm and below, a self-aligned double patterning process (Self-aligned Double Patterning, SADP) is generally used. [0003] In the SADP process, in order to improve the overlay accuracy of lithography, the overlay alignment mark (OVL mark) on the mask is usually divided to obtain corresponding dense lines (dense lines) on the wafer surface. The dense lines after segmentation obtained by etching the wafer have poor stability, especially the dense lines formed on the edge of the wafer are prone to disconnection, which will cause abnormalities in su...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a method for manufacturing a mask and a mask to solve the problem of disconnection of overlay alignment marks corresponding to the dense lines formed on the wafer surface in the SADP process

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