Manufacturing method of semiconductor element

A manufacturing method, semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc.

Active Publication Date: 2020-01-17
UNITED MICROELECTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there is still a lot of room for improvement in the structure design and channel control of general vertical transistors, which is the goal of active research in this field

Method used

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  • Manufacturing method of semiconductor element
  • Manufacturing method of semiconductor element
  • Manufacturing method of semiconductor element

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Embodiment Construction

[0035] In order to enable those who are familiar with the technical field of the present invention to further understand the present invention, the preferred embodiments of the present invention are specifically listed below, and with the accompanying drawings, the composition of the present invention and the desired effects are described in detail. .

[0036] For the convenience of description, the drawings of the present invention are only schematic diagrams for easier understanding of the present invention, and the detailed proportions thereof can be adjusted according to design requirements. Those skilled in the art should be able to understand the upper and lower relationships of relative elements in the figures described in the text to refer to the relative positions of objects, so they can be turned over to present the same components, which should all be disclosed in this specification The scope is described here first.

[0037] Figure 1 to Figure 8 A schematic cross...

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Abstract

The invention discloses a manufacturing method of a semiconductor element. The method comprises the steps of firstly, providing a substrate, wherein a first groove and a second groove are formed in the substrate, and one width of the first groove is smaller than one width of the second groove; then, forming a first spin-on dielectric (SOD) layer, fully filling the first groove with the first spin-on dielectric layer and filling the second groove with part of the first spin-on dielectric layer, then carrying out a first processing step to convert the first spin-on dielectric layer into a firstsilicon oxide layer; subsequently forming a silicon nitride layer on the first silicon oxide layer in the second groove, then forming a second spin-on dielectric (SOD) layer on the silicon nitride layer in the second recess, and carrying out a second processing step to convert the second spin-on dielectric into a second silicon dioxide layer.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing technology, in particular to a method for manufacturing a semiconductor element comprising a silicon oxide layer formed by conversion of a spin-on dielectric layer (spin ondielectric, SOD). Background technique [0002] Dynamic random access memory (dynamic random access memory, DRAM) is a kind of volatile memory, which is composed of a plurality of storage units. Each memory cell is mainly composed of a transistor and a capacitor controlled by the transistor, and each memory cell is electrically connected to each other through a word line (WL) and a bit line (BL). [0003] In order to increase the density of dynamic random access memory (DRAM) to speed up the operation speed of components, and to meet consumer demand for miniaturized electronic devices, the length of the channel region of transistors in dynamic random access memory (DRAM) will have a continuous shortening trend. Howev...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
CPCH01L21/76224H01L21/76229H01L21/76232H10B12/488H10B12/485H10B12/09H01L29/0649H10B12/03H10B12/30
Inventor 蔡亚萤林耿任
Owner UNITED MICROELECTRONICS CORP
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