Host competition generation method
A generation method and host technology, applied in the direction of instruments, safety arrangements, control/regulation systems, etc., can solve problems such as system downtime, redundancy, and system errors, and achieve the effect of rationalization of competition
Inactive Publication Date: 2020-02-11
FOSHAN BAYKEE NEW ENERGY TECH INC
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Problems solved by technology
[0003] One characteristic of master-slave control is that there can only be one host in the entire system. If there are multiple hosts, the entire system will fail, and the host plays a very important role as the core of the entire system. How the system generates the host becomes the master. From a very important technical point in the control system, some applications simply designate a specific machine as the host. If the host fails and cannot generate a new host, the entire system will shut down. Although this method is simple However, the effect of redundancy cannot be achieved. Therefore, the present invention proposes a competition generation method for hosts to solve the problems existing in the prior art
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[0031] In order to make the technical means, objectives, and effects of the invention easy to understand, the present invention will be further described below in conjunction with specific embodiments.
[0032] according to figure 1 , 2 As shown, this embodiment provides a host competition generation method, the specific steps are as follows:
[0033] Step 1: Add MS bus
[0034] Each machine in the system is used for parallel state and data transmission through the parallel interface, and then an MS bus is added to the parallel interface for host competition, such as figure 1 ;
[0035] Step 2: Configure the host competition circuit
[0036] Set up a host competition circuit inside each machine, and connect the output end of the circuit to the MS bus, such as figure 2 , and then use 2 IO pins to connect the control DSP inside each machine to the host competition circuit, where IO-1 is set as the output pin of the host competition circuit. When the IO-1 pin of the DSP out...
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The invention discloses a host competition generation method. The method comprises the following steps: adding an MS bus; configuring a host competition circuit; connecting an MS-BUS; setting a mechanism and a serial number address; carrying out monitoring in real time; setting a local competition success standard; and setting a competition protection mechanism. According to the invention, the status of each device in the system is set to be equal and all devices can serve as a host through a competition mechanism; the system does not specify a host and the host needs to be autonomously generated by the competition mechanism; when the host fails, a new host can be rapidly generated to guarantee the normal and continuous operation of the whole system. Meanwhile, the competition time of eachmachine is related to the equipment address and thus the competition time of each machine is staggered, so that the phenomenon that multiple hosts compete successfully at the same time is avoided andcompetition is reasonable.
Description
technical field [0001] The invention relates to the technical field of automatic control, in particular to a competition generation method for hosts. Background technique [0002] In some parallel applications of power electronics, there are many different control methods, such as: distributed control, master-slave control, etc. Among them, master-slave control is a widely used one, and master-slave control is to be used in many units. One of the devices is used as the master, and the others are slaves. The master sends out various synchronization and control signals, and the slave follows the synchronization and control signals of the master to adjust its working state to be consistent with that of the master. For example, inverters are paralleled. , there will be differences in the input DC voltage and circuit parameters of each inverter, so when in parallel connection, the slave should adjust its own output voltage amplitude, frequency, phase and output current parameters...
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IPC IPC(8): G05B9/02
CPCG05B9/02
Inventor 黄敏罗世明
Owner FOSHAN BAYKEE NEW ENERGY TECH INC