Thread scheduling method and device based on RISC-V multi-core processor

Abstract

The invention provides a thread scheduling method and device based on an RISC-V multi-core processor. The thread scheduling method comprises the following steps: in response to a target thread scheduling instruction, obtaining a kernel identifier of a first processor kernel occupied by a current thread; judging whether the kernel identifier of the first processor kernel and the kernel identifier of a second processor kernel are the same or not, and obtaining a judgment result; and scheduling the target thread according to the judgment result so as to enable the target thread to run in the second processor core. By utilizing the thread scheduling method, a target thread in a processor core in an idle state can be allocated to an emergency task; required resources are provided for running ofthe program, so that running of the emergency task is completed quickly, information is processed more efficiently in a concurrent manner, dynamic load balance of the multi-core processor is realized, data processing performance of the multi-core processor is improved, and energy consumption of the multi-core processor is reduced indirectly.

Description

technical field [0001] The invention relates to the field of computers, in particular to a thread scheduling method and device based on a RISC-V multi-core processor. Background technique [0002] RISC-V is an open source instruction set architecture designed and released by the University of California at Berkeley (UCB). Its goal is to become Linux in the field of instruction set architecture, with applications covering IoT (Internet of Things) devices and desktops. Computers, high-performance computers and many other fields. [0003] Compared with other instruction set frameworks in the prior art, the RISC-V framework has the key advantages of open source, differentiation and freedom of choice. Therefore, many processors based on the RISC-V framework have appeared, and the implementation of these processors The range is vast, from simple IoT processors to application processors running Linux, all based on a common set of instructions. At the same time, in order to improv...

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Problems solved by technology

[0005] Aiming at the problem mentioned above that if the specified processor core is not in the idle state, it cannot respond to the user's operation in time, resulting in delay or lag, a thread scheduling method based on RISCV multi-core processor is proposed, which can According to the pre-set data processing logic, the thread specified by the user is scheduled to run, so that the thread scheduling process is smoother, the stuttering phenomenon is reduced, the program runs more smoothly, and the user experience is improved.

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