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High-reliability navigation sensor single event upset resisting device based on FPGA

An anti-single particle and flip device technology, applied in measurement devices, instruments, simulators, etc., can solve problems such as single particle flip and products not working properly.

Active Publication Date: 2020-07-07
SHANGHAI AEROSPACE CONTROL TECH INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, SRAM-type FPGAs are prone to single-event flips in space, making the product unable to work normally

Method used

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  • High-reliability navigation sensor single event upset resisting device based on FPGA
  • High-reliability navigation sensor single event upset resisting device based on FPGA

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Experimental program
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Embodiment Construction

[0022] The present invention will be further elaborated below by describing a preferred specific embodiment in detail in conjunction with the accompanying drawings.

[0023] Such as figure 1 As shown, a highly reliable navigation sensor anti-single event reversal logic circuit based on FPGA includes: a monitoring unit, which is used to monitor the number of signal transition edges; a first identification output unit, whose input terminal is connected to the monitoring unit , for outputting a first abnormal identification signal when the number of signal transition edges is less than a preset threshold during the preset duration of the monitoring window; the control unit, whose input end is connected to the identification output unit, is used for according to the described The first abnormal identification signal stops feeding the watchdog chip.

[0024] The monitoring unit is also used to monitor whether the signal is constant within the preset time period of the monitoring w...

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Abstract

The invention discloses a high-reliability navigation sensor single event upset resistance device based on an FPGA, and the device comprises a monitoring unit which is used for monitoring the number of signal jump edges; a first identification output unit, wherein the input end of the first identification output unit is connected to the monitoring unit, and the first identification output unit isused for outputting a first abnormal identification signal when the number of signal jumping edges is smaller than a preset threshold value in a preset duration of the monitoring window; and a controlunit, wherein the input end of the control unit is connected to the identification output unit, and the control unit is used for stopping feeding the watchdog chip according to the first abnormal identification signal.

Description

technical field [0001] The invention particularly relates to a high-reliability navigation sensor anti-single event reversal device based on FPGA. Background technique [0002] The navigation sensor is a kind of attitude sensor widely used on satellites or star orbiters, and it is a precision device for optical imaging and attitude determination. By driving the detector for imaging, image processing includes image filtering, non-uniform correction and edge extraction. The pose of the sensor is calculated from the extracted edge points. All the above processes are implemented in FPGA, and now the mainstream FPGA chip of navigation sensor is SARM type. However, SRAM-type FPGAs are prone to single-event flips in space, making the product unable to work normally. Through the real-time detection of key signals in the program of the entire system, it can be judged whether the product is working normally. Contents of the invention [0003] The purpose of the present invention...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01S19/21G01S19/01G05B19/042G05B19/048
CPCG01S19/21G01S19/015G05B19/0428G05B19/048G05B2219/24125
Inventor 左乐郑循江朱庆华陈纾余路伟张磊杨逸峰杨世坤曹卫卫
Owner SHANGHAI AEROSPACE CONTROL TECH INST
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