Universal conversion isolation circuit adaptive to MCU simulators of various models
A technology for isolating circuits and emulators, applied in the direction of instruments, electrical digital data processing, computing, etc., can solve the problems of bulky, damage, occupying PCB board area, etc., to simplify the simulation interface, improve development efficiency, and reduce PCB board area effect
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Embodiment 1
[0024] refer to figure 1 In this embodiment, a general conversion isolation circuit adapted to various types of MCU emulators includes a first conversion isolation circuit 10 , a second conversion isolation circuit 20 and a third conversion isolation circuit 30 .
[0025] The first conversion isolation circuit 10 includes: a first emulator interface 101, a combination switch 102, a first isolation chipset 103 and a first chip interface 104, and the first isolation chipset 103 includes a plurality of capacitive coupling isolation chips; the combination switch 102 The first end is connected to the first emulator interface 101 , and the second end of the combination switch 102 is connected to the first chip interface 104 through the first isolation chipset 103 ; the combination switch 102 includes a plurality of on-off lines.
[0026] The second conversion isolation circuit 20 includes: a second emulator interface 201, a second isolation chipset 202 and a second chip interface 20...
Embodiment 2
[0030] refer to Figure 2a , 2b , 2c, 2d, 3a, 3b, 3c, 4a, 4b, 4c, on the basis of embodiment 1, the combined switch 102 in this embodiment includes switch J1, switch J2, switch J3, switch J4, switch J5, switch J50 , switch J6, switch J7, switch J8, switch J9, switch J10, switch J100, switch J11, switch J12, switch J13, switch J14; the first isolation chip set 103 includes isolation chip U1, isolation chip U2 and isolation chip U3, The model of the isolation chip U1 is Si8600, the model of the isolation chip U2 is Si8605, and the model of the isolation chip U3 is Si8600. The parameters of the Si8600 chip and the Si8605 chip can refer to the prior art, and will not be listed here in this embodiment.
[0031] The first end of the switch J1 is connected to the pin 1 of the first emulator interface 101, the second end of the switch J1 is connected to the pin 4 of the isolation chip U2; the first end of the switch J2 is connected to the pin 2 of the first emulator interface 101 , ...
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