Structure and device using hybrid bonding and methods of forming same
A bonding and device technology, applied in semiconductor devices, electrical solid devices, semiconductor/solid device manufacturing, etc., can solve problems such as high cost
Inactive Publication Date: 2020-08-21
YANGTZE MEMORY TECH CO LTD
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- Application Information
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Problems solved by technology
However, as the feature size of semiconductor devices approaches the lower limit, planar processes and fabrication techniques become challenging and costly
Method used
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[0022] While specific configurations and arrangements are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements may be used without departing from the spirit and scope of the present disclosure. It will be apparent to those skilled in the relevant art that the present disclosure may also be used in various other applications.
[0023] It should be noted that references in the specification to "one embodiment," "an embodiment," "exemplary embodiment," "some embodiments," etc. indicate that the described embodiments may include a particular feature, structure, or characteristic, But each embodiment may not necessarily include that particular feature, structure or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, when a particular feature, structure or characteristic is described in conjunction with...
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The invention discloses embodiments of a bonded semiconductor structure and disclosed manufacturing method thereof. In one embodiment, a semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first interconnect layer including a first interconnector. The at least one first interconnector is a first dummy interconnector. The first semiconductor structure also includes a first bonding layer including a first bonding contact. Each first interconnector is in contact with the corresponding first bonding contact. The second semiconductor structure includes a second interconnect layer including a second interconnector. The at least one second interconnector is a second dummy interconnector. The second semiconductor structure also includes a second bonding layer including a second bonding contact. Each second interconnector is in contact with the corresponding second bond contact. The semiconductor devicealso includes a bonding interface between the first bonding layer and the second bonding layer. Each first bonding contact is in contact with the corresponding second bonding contact at the bonding interface.
Description
[0001] This application is a divisional application. The original application is the international patent application PCT / CN2019 / 073909 that entered the Chinese national phase on March 6, 2019, and the international filing date is January 30, 2019. The Chinese national application number of the original application It is 201980000243.6, and the title of the invention is "Hybrid Bonding Using Dummy Bonding Contacts and Dummy Interconnects." technical field [0002] Embodiments of the present disclosure relate to bonded semiconductor structures and methods of manufacturing the same. Background technique [0003] Planar semiconductor devices such as memory cells are scaled to smaller sizes by improving process technology, circuit design, programming algorithms, and manufacturing processes. However, as the feature size of semiconductor devices approaches the lower limit, planar processes and fabrication techniques become challenging and costly. Three-dimensional (3D) device arc...
Claims
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IPC IPC(8): H01L23/485H01L23/488H01L21/60
CPCH01L23/482H01L24/08H01L24/03H01L24/82H01L2224/08057H01L2224/0231H01L2224/02331H01L2224/822H01L2224/08145H01L2224/09517H01L2224/80895H01L2224/80896H01L2224/80894H01L2224/08058H01L2224/0345H01L2224/03452H01L2224/03616H01L2224/80357H01L2224/80013H01L2224/80048H01L24/09H01L24/80H01L24/05H01L2224/05684H01L2224/05657H01L2224/05647H01L2224/05624H01L25/18H01L25/50H10B41/50H10B41/27H10B43/50H10B43/27H01L24/06H01L2224/06517H01L2924/00014H01L2924/013H01L21/76841H01L2224/08147H01L23/53238H01L23/5384H01L24/19H01L24/20H10B43/35
Inventor 王涛胡思平王家文黄诗琪朱继锋陈俊华子群
Owner YANGTZE MEMORY TECH CO LTD