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Semiconductor packaging method

A packaging method and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problems such as the decrease of the bonding and positioning ability of the die 5, the deviation from the predetermined bonding position, and the decrease in the viscosity of the adhesive tape 6, etc., Achieve the effects of reducing the movable range, preventing relative displacement, and ensuring the success rate

Active Publication Date: 2020-09-15
SIPLP MICROELECTRONICS CHONGQING CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] like Figure 1(a)-Figure 1(c) As shown, in the heat-compression molding process, the molded resin material 1 moves vertically and left and right in the mold cavity under the action of the upper pressure plate 2 of the molding machine, so that the molded resin material 1 is evenly distributed and compacted The encapsulation layer 4 is formed on the surface of the carrier board 3 after solidification, but the left and right movement of the molding resin material 1 will form a horizontal force F on the dies 5 arranged on the carrier board 3 according to a predetermined position, and the hot pressing The pressure of the molding process is very high, and in a high temperature environment, the viscosity of the adhesive tape 6 decreases, thereby reducing the bonding and positioning ability of the die 5, so the die 5 is easy to move under the pressure of the molding resin material 1 , deviate from the intended bonding position
[0004] Due to the occurrence of the offset phenomenon of the bare chip 5, it is difficult to locate the precise position of the bare chip 5 in the carrier 3 in the subsequent wiring process, which has a great impact on the wiring process, and even makes the wiring process difficult to carry out.

Method used

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  • Semiconductor packaging method
  • Semiconductor packaging method
  • Semiconductor packaging method

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Embodiment Construction

[0040] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.

[0041] The terminology used in this application is for the purpose of describing particular embodiments only, and is not intended to limit the application. Unless otherwise defined, the technical terms or scientific terms used in the present application shall have the common meanings understood by those skilled in the art to which the present invention belongs. Words such as "one" or "o...

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Abstract

The invention provides a semiconductor packaging method, which comprises the following steps: mounting a plurality of to-be-packaged chips on a carrier plate, so that a plurality of mounting areas onwhich the plurality of to-be-packaged chips are mounted and blank areas surrounding the mounting areas are formed on the carrier plate; placing a mold frame in the blank areas on the carrier plate, wherein the mold frame is of a closed structure, a plurality of hollowed-out areas are arranged in the mold frame, and the hollowed-out areas correspond to the mounting areas one to one; and forming anencapsulation layer, wherein the encapsulation layer covers the carrier plate, fills the hollow area of the mold frame, and is used for encapsulating the plurality of to-be-packaged chips.

Description

technical field [0001] The present application relates to the technical field of semiconductors, in particular to a semiconductor packaging method. Background technique [0002] Common semiconductor packaging technology, such as chip packaging technology, mainly includes the following process: first, the front of the die is bonded to the carrier board with adhesive tape, then heat-pressed and molded, and then the carrier board is peeled off, and the rewiring process is performed on the front side of the die , forming a rewiring structure, and encapsulating. [0003] like Figure 1(a)-Figure 1(c) As shown, in the heat-compression molding process, the molded resin material 1 moves vertically and left and right in the mold cavity under the action of the upper pressure plate 2 of the molding machine, so that the molded resin material 1 is evenly distributed and compacted The encapsulation layer 4 is formed on the surface of the carrier board 3 after solidification, but the left...

Claims

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Application Information

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IPC IPC(8): H01L21/60H01L21/56
CPCH01L24/83H01L21/563H01L2224/83005H01L2224/83051
Inventor 周辉星
Owner SIPLP MICROELECTRONICS CHONGQING CO LTD
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