Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. The array substrate includes a substrate and a driving circuit layer on the substrate. A pixel driving circuit is arranged in the driving circuit layer, and each pixel driving circuit includes a threshold compensation transistor; the threshold compensation transistor includes a first channel region, a second channel region and the middle active region, the middle active region is set between the first channel region and the second channel region; the first voltage line and the data signal line are arranged in the driving circuit layer; the first voltage line and the middle active The vertical projections of the regions on the substrate at least partially overlap, and the vertical projections of the data signal lines and the first voltage lines on the substrate do not overlap. Not only can the variation of the gate potential of the driving transistor be reduced, but also the display uniformity of the display panel formed by the array substrate can be improved. At the same time, the delay generated when writing the data signal on the data signal line can be reduced, which is beneficial to reducing the time requirement for data writing, thereby facilitating the realization of a high refresh rate of the display panel.

Description

technical field [0001] Embodiments of the present invention relate to the field of display technologies, and in particular, to an array substrate and a display panel. Background technique [0002] The display panel can drive the light-emitting device to emit light through the pixel driving circuit to realize display. During the operation of the pixel driving circuit, the parasitic capacitance formed between the power signal line and the intermediate node of the threshold compensation transistor can be increased to ensure that the gate potential of the driving transistor remains unchanged after charging, thereby improving the display uniformity of the display panel. However, the above process tends to increase the parasitic capacitance on the data signal line, which further increases the time required for writing the data voltage during the data writing phase, which is not conducive to the high refresh rate of the display panel. Contents of the invention [0003] The inven...

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Problems solved by technology

However, the above process tends to increase the parasitic capacitance on the data signal line, which in turn leads to an increase in the time required to write the data voltage during the data writing phase, which is not conducive to the high refresh rate of the display panel.

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