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Approximate multiplier design method, approximate multiplier and FIR filter

A multiplier and logic design technology, applied in the field of low-power digital signal processing circuit design, can solve problems such as the inability to ensure the calculation accuracy of the approximate compressor and the number of resources occupied, and the modification of calculation logic without theoretical basis and error constraints, etc., to achieve The effect of ensuring calculation accuracy and resource utilization efficiency

Pending Publication Date: 2020-09-22
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

At present, there is no systematic design standard for the design of the approximate compressor. The general method is to artificially change the calculation logic of the compressor randomly. There is no theoretical basis and error constraints for the modification of the calculation logic, so the calculation of the designed approximate compressor cannot be guaranteed. Accuracy and resource footprint

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  • Approximate multiplier design method, approximate multiplier and FIR filter
  • Approximate multiplier design method, approximate multiplier and FIR filter
  • Approximate multiplier design method, approximate multiplier and FIR filter

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Embodiment Construction

[0039] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0040] A commonly used accurate 4:2 compressor in the prior art is implemented by cascading two accurate full adders, the inputs of which include four marked X 1 ~X 4 a partial product input and a carry input (C in ), whose output includes a carry out (C out ), a false output (Carry) signal and a summation signal (Sum), the truth table of which is as follows figure 1shown. Among them, the carry input is connected to the carry output of other circuits, and the carry output is connected to the carry input of other circuits, that is, the precise 4:2 compressor needs to wa...

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Abstract

The invention relates to an approximate multiplier design method, an approximate multiplier and an FIR filter. The method comprises the following steps: eliminating carry input and carry output logicsof an accurate 4: 2 compressor, modifying a summation output truth table of the accurate 4: 2 compressor according to a preset average absolute error value constraint condition to obtain approximatecompression logics, and designing the approximate compressor according to the approximate compression logics; designing an approximate multiplier according to a preset multiplier bit width, a preset multiplicand bit width, a preset calculation precision constraint condition and a preset resource occupation constraint condition. According to the method, transmission delay in a partial product compression process is eliminated; an approximate compressor with error constraint is designed according to a preset average absolute error value constraint condition; based on the approximate compressor,the multiplier structure with the most balanced error performance and resource occupation performance is selected to design the approximate multiplier, and the calculation accuracy and resource utilization efficiency of the approximate multiplier based on compression calculation logic modification can be ensured.

Description

technical field [0001] The present application relates to the technical field of low power consumption digital signal processing circuit design, in particular to an approximate multiplier design method, an approximate multiplier and an FIR filter. Background technique [0002] In some fault-tolerant applications, the accuracy of calculated values ​​can be moderately reduced, and calculations are performed on an "approximate" basis, and related technologies are collectively referred to as approximate calculations. The main idea of ​​circuit design for approximate computing is to change the logic of circuit implementation and reduce the resources occupied by the circuit by simplifying the circuit structure. Approximate calculation circuits have been widely used in digital signal processing (DSP) systems, multimedia, fuzzy logic and neural networks. While providing practical calculation results for related applications, the circuit is simplified and the chip area is reduced by ...

Claims

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Application Information

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IPC IPC(8): G06F30/32G06F30/327G06F7/523H03H17/00
CPCG06F30/32G06F30/327G06F7/523H03H17/00H03H2017/0081
Inventor 杨志玺杨道宁杨俊谭文若胡梅赵振岩刘思力
Owner NAT UNIV OF DEFENSE TECH
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