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Multiplier based on operand clipping

An operand and multiplier technology, applied in the field of approximate computing, can solve the problems of tediousness, affecting operation speed, large area overhead and time delay of multiplication operation, and ensuring calculation accuracy, reducing energy consumption, reducing area overhead and time delay. Effect

Active Publication Date: 2020-10-02
HOHAI UNIV CHANGZHOU
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The existing approximate calculation method is still relatively cumbersome, and the area overhead and time delay of the multiplication operation are relatively large, which affects the overall operation speed

Method used

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  • Multiplier based on operand clipping
  • Multiplier based on operand clipping
  • Multiplier based on operand clipping

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0079] First, assume that the two decimal operands are:

[0080] A=85, B=170;

[0081] Expressed in binary, if the register bit width:

[0082] no 1 =n 2 = 8;

[0083] but:

[0084] a 0 =a 2 =a 4 =a 6 = 1,a 1 =a 3 =a 5 =a 7 = 0;

[0085] b 0 =b 2 =b 4 =b 6 =0,b 1 =b 3 =b 5 =b 7 = 1;

[0086] based on n 1 , n 2 The value of , setting the number of interception intervals when performing approximate operations on A and B respectively:

[0087] k=2, l=2;

[0088] Second, set the approximation flag:

[0089] A c =or(a 4 ,a 5 ,a 6 ,a 7 )=1,

[0090] B c =or(b 4 ,b 5 ,b 6 ,b 7 )=1;

[0091] Then, based on the value of k, the 1st and 3rd bits of the binary operand A are removed from the lower bits, and the value of the 4th bit is updated at the same time to obtain a simplified multiplication input item A for multiplication p :

[0092] a' 4 =or(and(a 3 ,a 1 ),a 4 )=1,

[0093]

[0094] Similarly, based on the value of l, the 1st and 3rd ...

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Abstract

The invention belongs to the technical field of approximate calculation, in particular to a multiplier based on operand clipping. The multiplier comprises a multiplication input item interception module, a bit product module and a partial accumulation module. According to the invention, a simplified multiplication input item is determined through the interception operation; an approximate flag bitis introduced before the interception operation to judge whether the interception operation is carried out or not; after the interception operation, the high order in the simplified multiplication input item is updated, so the partial accumulation process is simpler, the area overhead and the time delay required by partial accumulation are reduced, the energy consumption of multiplication operation is reduced, and the calculation precision of multiplication results is ensured at the same time.

Description

technical field [0001] The invention relates to a multiplier based on operand clipping, which belongs to the technical field of approximate calculation. Background technique [0002] Multipliers are used in a wide variety of applications and are integral to many key areas. [0003] For most applications, some loss of accuracy can be tolerated. Therefore, in order to reduce the area overhead and time delay brought by the precise multiplier, researchers have proposed many approximate multiplier designs. Among them, according to the approximation object, it can be divided into approximation for operands, approximation for partial product generation process, approximation for partial product tree, and approximation for addition compression. The existing approximate calculation methods are still relatively cumbersome, and the area overhead and time delay of the multiplication operation are relatively large, which affects the overall operation speed. Contents of the invention ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/523G06F9/30
CPCG06F7/523G06F9/30098G06F9/30007
Inventor 王海滨褚嘉敏顾鑫涛陈冰姚潇
Owner HOHAI UNIV CHANGZHOU