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Reverse blocking type gate commutated thyristor and manufacturing method thereof

A technology of gate commutation and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of not being able to maintain low on-state voltage drop and low trigger current of GCT at the same time, device avalanche failure, carrier Difficult to extract and other issues

Active Publication Date: 2020-10-27
ZHUZHOU CRRC TIMES SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] 2) During the process of reverse blocking recovery and shutdown of GCT, due to the injection of a large amount of storage in the N - Carriers in the base region, electrons pass through the N + region flows to the cathode, and the holes flow to the anode, so that there is a high electric field at the terminal of the chip mesa during the reverse recovery phase, and a large number of carriers stored at the terminal are not easy to be extracted to the anode, which also easily leads to avalanche failure of the device
[0015] However, none of the above methods can maintain the technical advantages of low on-state voltage drop and low trigger current of GCT and improve the turn-off current capability and reverse recovery-di / dt capability of reverse resistance GCT at the same time.

Method used

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  • Reverse blocking type gate commutated thyristor and manufacturing method thereof
  • Reverse blocking type gate commutated thyristor and manufacturing method thereof
  • Reverse blocking type gate commutated thyristor and manufacturing method thereof

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Embodiment 1

[0055] figure 2 It is a schematic plan view of a reverse-resistance gate-commutated thyristor according to Embodiment 1 of the present invention.

[0056] Such as figure 2 As shown, a GCT chip usually includes multiple basic GCT units. In the top view of the GCT cathode surface, the GCT cathode consists of many N + The emitter area (cathode comb) is formed, and each cathode comb corresponds to a basic GCT unit in the longitudinal direction. The cathode combs of the same size are arranged in circles along concentric circles with different diameters, and the cathode combs on the same circle are evenly arranged radially towards the center. The gate lead-out position is usually designed according to the chip size. In this embodiment, the gate terminal is located at a middle position between the chip center position of the thyristor and the edge terminal position of the thyristor.

[0057] Such as image 3 as shown, figure 2 The layered structure of the reverse-resistance...

Embodiment 2

[0074] Different from Embodiment 1, in this embodiment, the gate terminal is located adjacent to the edge terminal of the thyristor. In this case, the P 2 + anode emitter located at the P + N + area below the emitter and the P + The region of the anode emitter region at the edge termination location of the thyristor (eg Figure 5 and Image 6 shown).

[0075] To sum up, in the above-mentioned embodiment, by introducing a low emission anode structure (P 1 + anode emitter and P 2 + Anode emitter region) spontaneously adjusts the carrier concentration distribution at the terminal of the mesa, which can solve the -di / dt withstand capacity of the reverse resistance GCT in the reverse recovery stage, and can also adjust the current density of the cathode comb far away from the gate. Avoid carrier accumulation and finally lead to breakdown and turn-off failure. The new structure proposed by the present invention is especially suitable for large-size reverse resistance GCT ...

Embodiment 3

[0077] Figure 7 It is a schematic diagram of the manufacturing process of the reverse resistance type gate-commutated thyristor chip according to the third embodiment of the present invention. Specifically, the method for manufacturing a reverse-resistance gate-commutated thyristor chip of the present application includes the following steps:

[0078] In step S801, prepare N - type single crystal silicon substrate. First provide an N - Type-doped single crystal silicon substrate, the selection of substrate doping concentration and sheet thickness is mainly based on the requirements of parameters such as GCT blocking voltage and on-state voltage drop.

[0079] In step S802, to the N - Impurities are pre-deposited on the upper and lower surfaces of the type single crystal silicon substrate, and the impurities are diffused at high temperature to form a P base region and a P anode region. Optionally, using a closed-tube aluminum expansion process, the N - The upper surface ...

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Abstract

The invention discloses a reverse blocking type gate commutated thyristor and a manufacturing method thereof. The layered structure of the thyristor sequentially comprises a P<+> anode emitter region,a P anode region, an N<-> base region, a P base region, a P<+> base region and a plurality of N<+> emitter regions from bottom to top in the vertical direction, wherein the N<+> emitter regions are semi-buried at the top of the P<+> base region; in the direction of overlooking the thyristor from right above, the plurality of N<+> emitter regions are uniformly arranged along an arc in a pluralityof concentric circles which take the chip center of the thyristor as the center of a circle; the P<+> anode emitter region comprises a P1<+> anode emitter region and a P2<+> anode emitter region surrounding the P1<+> anode emitter region in the horizontal direction; and the P2<+> anode emitter region is located in an area below the N<+> emitter region away from the gate leading-out end of the P<+>anode emitter region and an area of the P<+> anode emitter region at the edge terminal position of the thyristor.

Description

technical field [0001] The invention relates to the technical field of power semiconductor devices, in particular to a reverse-resistance gate commutation thyristor and a manufacturing method thereof. Background technique [0002] Gate Commutated Thyristors (Gate Commutated Thyristors, GCTs) are semiconductor devices with ultra-large power capacity in the field of power electronics. The main structure in the vertical direction of the existing reverse-resistance GCT chip includes four layers of PNPN (such as figure 1 shown), according to the degree of doping, subdivided into P+ transparent emitter anode, N - base, P base, P + short base region and N + Emitter region (also known as cathode comb). There are three PN junctions inside the device, along the direction from the anode to the cathode, J 1 Junction (reverse blocking main junction), J 2 junction (forward blocking main junction) and J 3 junction (gate-cathode junction). For GCT cores with different diameters, the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/749H01L29/745H01L29/08H01L21/332
CPCH01L29/749H01L29/745H01L29/0834H01L29/66363
Inventor 陈勇民戴小平陈芳林蒋谊唐龙谷徐焕新
Owner ZHUZHOU CRRC TIMES SEMICON CO LTD