40 results about "Substrate doping" patented technology

This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold voltage may be set with reduced substrate doping requirements. Current leakage is improved by this process as well.

A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

The invention relates to a power LDMOS device with a junction field plate, and belongs to the technical field of power semiconductor devices. According to the power LDMOS device with the junction field plate, a buried layer opposite to a substrate doping type is formed on a substrate of a conventional LDMOS device, and the junction field plate formed by a PN junction is formed in the surface of a device drifting area. The power LDMOS device with the junction field plate uses PN junction electric field distribution in the junction field plate for modulating a device surface electric field, the distribution of the device surface electric field is made to be more even, the insufficiency of a peak of a tail end electric filed of a metal field plate can be effectively avoided, and breakdown performance of the device is improved. Under the reverse blocking state, the junction field plate has an auxiliary exhaustion function for the drifting area, the doping level of the drifting area can be improved to a large extent, and the on-resistance of the device is reduced. Meanwhile, reverse currents are small when reverse bias of the PN junction in the junction field plate occurs, the fact that leakage currents in the field plate are reduced is benefited, and the buried layer in the substrate can effectively improve the voltage endurance property of the device. The device has the advantages of being high in voltage, low in power consumption, low in cost and easy to integrate, and is suitable for power integrated circuits and radio frequency power integrated circuits.

A method of producing a batch of MQW lasers from a plurality of wafers having doping concentrations within a concentration range. The MQW lasers are produced by epitaxially growing an InGaAsP quaternary layer on the substrates in a metal-organic chemical vapor deposition (MOCVD) reactor. The method includes the steps of segregating the substrates into groups based upon the substrate doping concentrations and batch producing the lasers at specific target wavelengths for each segregated substrate group.

Short-circuit current, maximum power, and open circuit voltage during a single flash are determined by varying intensity, voltage, and current. An apparatus determines the substrate doping and the series resistance of the solar cell. The series resistance of the cell is determined from a voltage step from the maximum power voltage operating point to the open-circuit condition. Methods are described for determining the substrate doping from stepping or sweeping the voltage. The first uses a voltage step and finds the change in charge that results. This determines a unique doping if the series resistance is known. The second uses data for a case of varying current, voltage, and light intensity, and compares this data to the case of varying voltage and intensity with no current. By transposing both cases into the steady state, agreement between the two data sets is found for unique doping and series resistance values.

The invention provides a method for extracting gate oxide thickness and substrate doping concentration of a field effect transistor, which is characterized by comprising the following steps of: grounding a source electrode and a drain electrode of a device, connecting a substrate with smaller positive bias to enable a drain-body diode to be in positive bias and not conducted, scanning gate voltage from negative voltage to a positive voltage, measuring the relation curve of a generation-recombination current of the substrate and the gate voltage, and accurately extracting the gate oxide thickness and the substrate doping concentration of the field effect transistor by utilizing the position shift of the generation-recombination current peak of the positively-biased diode. In the method, a required measuring structure is simple and has high sensitivity and can be used for accurately reflecting the dependence of the gate oxide thickness on the substrate doping concentration.

A method of compensating for a contribution of conductivity of the semiconductor wafer to a measured trace by an in-situ electromagnetic induction monitoring system includes storing or generating a modified reference trace. The modified reference trace represents measurements of a bare doped reference semiconductor wafer by an in-situ electromagnetic induction monitoring system as modified by a neutral network. The substrate is monitored with an in-situ electromagnetic induction monitoring system to generate a measured trace that depends on a thickness of the conductive layer, and at least a portion of the measured trace is applied to a neural network to generate a modified measured trace. An adjusted trace is generated, including subtracting the modified reference trace from the modifiedmeasured trace.

A method of chemical mechanical polishing includes bringing a substrate having a conductive layer disposed over a semiconductor wafer into contact with a polishing pad, generating relative motion between the substrate and the polishing pad, monitoring the substrate with an in-situ electromagnetic induction monitoring system as the conductive layer is polished to generate a sequence of signal values that depend on a thickness of the conductive layer, determining a sequence of thickness values for the conductive layer based on the sequence of signal values, and at least partially compensating for a contribution of conductivity of the semiconductor wafer to the signal values.

The invention discloses a method for measuring the size of a nonbonding area on a bonding device structure. According to the method, light capable of penetrating through the bonding device structure to be measured is adopted to shine on the bonding device structure to be measured so that a Newton ring can be formed at the position corresponding to the nonbonding area in the light incidence direction, then the width, in the direction perpendicular to the light incidence direction, of the Newton ring is measured by means of an optical measuring microscope, and then the width, in the direction perpendicular to the light incidence direction, of the nonbonding area is obtained. According to the method, the measurement of the size of the nonbonding area on the bonding device structure is achieved by means of the Newton ring principle, an accurate measurement result can be obtained, no damage can be caused to the bonding device structure to be measured serving as a sample during measurement, and then production cost is reduced. Furthermore, the method can be applied to bonding device structures formed by bonding of wafers the thickness of each of which is o micron - 775 microns, or chips or other silicon substrates, the method supports substrate doping, the application range is wide, and practicality is high.

The invention discloses a manufacturing method of a laterally diffused metal oxide semiconductor element. The manufacturing method is as follows: a providing a substrate with a first conduction type, wherein the substrate is internally provided with a well area with a second conduction type; then, forming a substrate doping area in the well area and forming a channel definition doping area in the substrate doping area, wherein the substrate doping area is provided with the first conduction type, and the channel definition doping area is provided with the second conduction type; utilizing the substrate doping area which is positioned between the channel definition doping area and the well area and is not covered by the channel definition doping area to form a channel of the laterally diffused metal oxide semiconductor element; and then, forming a grid structure on the channel. Therefore, by utilizing the manufacturing method, the channel change due to displacement of the grid structure can be avoided.