21 results about "Substrate doping" patented technology

A method for fabricating a MEMS device comprising the following steps: providing a first bonding surface (1) on a first substrate (2) with a first substrate doping; providing a second bonding surface (3) on a second substrate (4) with a second substrate doping; aligning and joining the first and second bonding surfaces (1, 3) by a Si-Si direct bonding process, wherein both bonding surfaces (1, 3) have a silicon surface, and wherein an additional near-surface first doping layer (5) is produced below at least one of the bonding surfaces (1).

The application provides a solar cell, a manufacturing method, a photovoltaic device and a photovoltaic system. The solar cell includes a substrate, a doped conducting layer, a first passivation layer, an anti-reflection layer, a passivation contact layer, and a second passivation layer. The substrate includes opposite first and second surfaces, and side surfaces between the first and second surfaces. The doped conducting layer and the first passivation layer are sequentially stacked on the first surface. The anti-reflection layer is stacked on the first passivation layer and covers the first surface to cover the first passivation layer. The passivation contact layer is stacked on the second surface. The second passivation layer is stacked on the passivation contact layer and covers the second surface to cover the passivation contact layer. The anti-reflection layer or the second passivation layer covers at least part of at least one side surface of the substrate.

Provided are a solar cell, a method for preparing a solar cell, a tandem solar cell, and a photovoltaic module. The solar cell includes a substrate, a doped conductive layer, and a dielectric layer. The substrate has a first surface, where the first surface includes electrode regions and non-electrode regions that are alternatingly arranged along a first direction. The doped conductive layer is formed over the first surface of the substrate. The doped conductive layer includes first conductive portions and at least one second conductive portion. Each respective first conductive portion of the first conductive portions is formed over a respective electrode region of the electrode regions, and each respective second conductive portion of the at least one second conductive portion is formed over a part of a non-electrode region of the non-electrode regions. The dielectric layer is between the first surface and the doped conductive layer.

The present application relates to a solar cell and a method for manufacturing same, a photovoltaic module, and a photovoltaic system. The solar cell includes a substrate, a doped conducting layer, a first passivation layer, a passivating contact layer, and a second passivation layer. At least a first surface and a portion of a first side surface of the substrate include a textured structure. The doped conducting layer is disposed at least on the first surface and the first side surface to cover the textured structure. The first passivation layer is stacked on the doped conducting layer and covers the first surface and the first side surface to cover the doped conducting layer. The passivating contact layer is disposed on a second surface of the substrate. The second passivation layer is stacked on the passivating contact layer and covers the second surface to cover the passivating contact layer.

The invention discloses a multilayer stress sensor prepared based on a laser direct writing technology and a preparation method thereof, and belongs to the technical field of flexible electronic device preparation. The sensor is in a Y shape, three sensors extend from the center point along three different angles, and the center points of the three sensors are connected with one another. The invention discloses a multilayer stress sensor prepared based on a laser direct writing technology. The multilayer stress sensor is prepared on a doped flexible substrate by adopting the laser direct writing technology. Through a laser direct writing technology based on flexible substrate doping, a strain sensor unit capable of realizing plane strain direction identification is prepared. Finite element simulation and mechanical test prove that the sensing unit has the capability of realizing strain direction identification on a plane. The multilayer stress sensor prepared based on the laser direct writing technology and the preparation method thereof can realize preparation of a large-scale sensing unit array compatible with a complex three-dimensional curved surface; the method has a wide application prospect in the fields of aerospace, building structure health monitoring and the like.

A method for doping a semiconductor substrate is provided which is a wet processing method and has excellent diffusibility of a dopant element in the semiconductor substrate. [Solution] This is a doping treatment method for semiconductor substrates, which includes a preparation step of preparing adjusted water with an adjusted concentration of dopant element and a pH of 2 or more, an application step of applying the adjusted water to a semiconductor substrate, and a heating step of heating the semiconductor substrate to which the adjusted water has been applied.The preparation step of adjusted water includes an addition step of adding a concentration adjuster containing a dopant component to the water to be treated while controlling the amount of addition, and a pH adjustment step of adjusting the pH of the water to be treated before or after the addition of the concentration adjuster.

The invention discloses a wide-spectrum silicon-based germanium detector, relates to the field of short-wave infrared light detection and imaging, and solves the technical problems that an existing silicon-based germanium photoelectric detector is narrow in response spectrum range, high in dark current and difficult to be compatible with sensitivity and integration level. The detector comprises a first substrate, and a doped source region, a doped drain region, a gate insulating layer and a gate electrode which are prepared on the first substrate to form a p-type field effect transistor; a substrate doping body region, a germanium epitaxial layer and a germanium doping region which are prepared on a first substrate form a PIN-type photodiode, the PIN-type photodiode is used for detecting incident light and converting the incident light into electrons and holes, and the electrons are accumulated in the first substrate of the p-type field effect transistor to change substrate potential so as to increase output current. The invention further discloses a preparation method of the wide-spectrum silicon-based germanium detector. According to the invention, the overall performance of high responsivity and wide spectrum is realized.

A method of compensating for a contribution of conductivity of the semiconductor wafer to a measured trace by an in-situ electromagnetic induction monitoring system includes storing or generating a modified reference trace. The modified reference trace represents measurements of a bare doped reference semiconductor wafer by an in-situ electromagnetic induction monitoring system as modified by a neutral network. The substrate is monitored with an in-situ electromagnetic induction monitoring system to generate a measured trace that depends on a thickness of the conductive layer, and at least a portion of the measured trace is applied to a neural network to generate a modified measured trace. An adjusted trace is generated, including subtracting the modified reference trace from the modified measured trace.

The present application relates to a solar cell and a method for manufacturing same, a photovoltaic module, and a photovoltaic system. The solar cell includes a substrate, a doped conducting layer, a first passivation layer, a passivating contact layer, and a second passivation layer. At least a first surface and a portion of a first side surface of the substrate include a textured structure. The doped conducting layer is disposed at least on the first surface and the first side surface to cover the textured structure. The first passivation layer is stacked on the doped conducting layer and covers the first surface and the first side surface to cover the doped conducting layer. The passivating contact layer is disposed on a second surface of the substrate. The second passivation layer is stacked on the passivating contact layer and covers the second surface to cover the passivating contact layer.

The application provides a ceramic fiber laser gain medium sheet and a preparation method thereof. The ceramic fiber laser gain medium sheet comprises a doped gain region, a substrate region and a substrate. The doped gain region comprises a ceramic substrate and active ions doped in the substrate, and the doped gain region is in the shape of a curved filament. The substrate region is made of ceramic material and is coated on the radial outer side of the doped gain region. The doped gain region and the substrate region are both arranged on the substrate. The ceramic fiber laser gain medium sheet has a pump light injection end, a laser injection end and a laser output end. Pump light and seed light are injected into the doped gain region through the pump light injection end and the laser injection end respectively. After the seed light is amplified by the doped gain region, the amplified seed light is output from the laser output end. The ceramic fiber laser gain medium sheet has a greatly improved nonlinear threshold, damage threshold and thermal conductivity, and the output power of the fiber laser is greatly improved. The devices are integrated on a heat sink plate, and complex shaping optical elements are not needed, so that the volume of the laser is greatly compressed.

A method of doping a substrate may include exposing a substrate surface of a semiconductor substrate to plasma cleaning, and after the plasma cleaning, depositing a dopant layer on the substrate surface using a plasma source, the dopant layer comprising a dopant element, and exposing the substrate to an implantation process while the dopant layer is being deposited on the substrate surface, the implantation process comprising introducing an ion species comprising the dopant element into the substrate. The substrate is maintained under vacuum during the plasma cleaning, dopant layer deposition, and implantation process, and during the implantation process, at least a portion of the dopant layer is implanted into the substrate.

A kind of silicon carbide ohmic contact electrode structure without step etching, epitaxial layer different from substrate doping type is grown on the surface layer of silicon carbide substrate piece, metal electrode array is manufactured on the surface of epitaxial layer, the manufacturing process of metal electrode does not need to rely on complex micro-nano manufacturing photoetching, etching and other processes, but uses tape with uniform edge geometry as mask to separate ohmic contact electrodes, finally, the sample is uniformly cut, and rectangular transmission line electrode without step is formed;The present application realizes the preparation of silicon carbide ohmic contact electrode with simpler structure and smaller leakage current error based on rectangular transmission line (TLM) principle, overcomes the complex process problem of traditional electrode rectangular transmission line method, reduces manufacturing cost while greatly shortens electrode preparation time, and is easy to realize.

A method for doping a semiconductor substrate includes: a preparation step for preparing conditioned water which has a pH of 2 or more and in which the concentration of a dopant element has been adjusted; an application step for applying the conditioned water to a semiconductor substrate; and a heating step for heating the semiconductor substrate to which the conditioned water has been applied. The conditioned water preparation step includes: an addition step for adding a concentration adjustment agent containing a dopant component to water to be treated and controlling the amount of the concentration adjustment agent added; and a pH adjustment step for adjusting the pH of the water to be treated before or after the addition of the concentration adjusting agent.

The present application provides a Group III element nitride substrate having excellent processability. The Group III element nitride substrate doped with a transition element has an absorption coefficient of light having a wavelength λ of 400 nm or more of 22 cm －1 The above.

A SiC substrate (10) is doped with vanadium. A high electron mobility transistor (20) is provided on the SiC substrate (10). The SiC substrate (10) includes a first substrate (1) and a second substrate (2) provided on the first substrate (1). Vanadium concentration of the first substrate (1) is 1×1018 cm−3 or more. Vanadium concentration of the second substrate (2) at an interface between the second substrate (2) and the high electron mobility transistor (20) is 1×1017 cm−3 or less.

A method of compensating for a contribution of conductivity of the semiconductor wafer to a measured trace by an in-situ electromagnetic induction monitoring system includes storing or generating a modified reference trace. The modified reference trace represents measurements of a bare doped reference semiconductor wafer by an in-situ electromagnetic induction monitoring system as modified by a neutral network. The substrate is monitored with an in-situ electromagnetic induction monitoring system to generate a measured trace that depends on a thickness of the conductive layer, and at least a portion of the measured trace is applied to a neural network to generate a modified measured trace. An adjusted trace is generated, including subtracting the modified reference trace from the modified measured trace.

Disclosed are a solar cell, a tandem solar cell, and a photovoltaic module. The solar cell includes a substrate, a doped semiconductor layer, a passivation layer and a plurality of electrodes. The substrate is provided with textured structures on a portion of a surface of the substrate. The doped semiconductor layer is disposed on the substrate. The solar cell further includes holes extending through the doped semiconductor layer, and corresponding to the textured structures, respectively, and a bottom of a respective hole exposes at least a portion of a corresponding textured structure. The passivation layer is formed over a surface of the doped semiconductor layer away from the substrate, fills the holes. The plurality of electrodes are arranged along a first direction, pass through the passivation layer and are in electrical contact with the doped semiconductor layer.

The invention relates to the field of semiconductor manufacturing, in particular to a novel oxide heterojunction production method, a novel transistor and a transparent device. Growing an indium gallium oxide epitaxial layer on the substrate; and growing an aluminum gallium oxide epitaxial layer on the indium gallium oxide epitaxial layer, so that two-dimensional electron gas is formed at the interface of the indium gallium oxide epitaxial layer and the aluminum gallium oxide epitaxial layer, and an indium gallium oxide / aluminum gallium oxide heterojunction is formed. The indium gallium oxide / aluminum gallium oxide heterojunction is used for replacing traditional silicon substrate doping, so that two-dimensional electron gas is prepared at the interface of the heterojunction, high carrier concentration is achieved on the premise that an ionization impurity scattering center is not introduced, the gallium oxide-based conducting layer with high carrier concentration and high mobility is prepared, and the conductivity of the gallium oxide-based conducting layer is improved. The performance of the gallium oxide device is greatly improved, and the application scene of the gallium oxide device is greatly widened.

The invention relates to a DEPFET comprising: a semiconductor substrate (100) of a first conduction type, which has a first main surface (101) and a second main surface (102), which are opposite one another; a source terminal region (1s) of a second conduction type on the first main surface (101); a drain terminal region (1d) of a second conduction type; a channel region (10), which is arranged between the source terminal region (1s) and the drain terminal region (1d); a gate electrode (11), which is separated from the channel region (10) by a gate insulator (6); a rear activation region (104) of a second conduction type, which is formed on the second main surface (102); and a substrate doping increase region (2) of a first conduction type, which is formed at least under the source terminal region (1s) and under the channel region (10), the substrate doping increase region (2) having a signal charge control region (20) of the first conduction type below the gate electrode (11), in which signal charge control region the effective doping dose has a higher value than at other points of the substrate doping increase region (2) below the gate electrode.

A method for forming a power semiconductor device, the method comprising: Providing a semiconductor wafer (101) with a phosphorus doping concentration of less than 10 15 / cm 3 , which has grown through a Czochralski process and has a first page (101a); Forming an n-type substrate doping layer (105) with phosphorus as the dopant in the semiconductor wafer (101) at the first side (101a), wherein the substrate doping layer (105) has a doping concentration of at least 10 17 / cm 3 , typically of at least 10 18 / cm 3 exhibits; Forming an epitaxial layer (110) on the first side (101a) of the semiconductor wafer (101) after forming the substrate doping layer (105) Images of a dopant layer (115) in the epitaxial layer (110) during growth of the epitaxial layer (110) by diffusion of dopants from the substrate dopant layer (105) into the epitaxial layer (110); and Forming a power semiconductor device (100) with the doping layer (115) as a functional layer of the power semiconductor device (100).

Disclosed are a solar cell, a tandem solar cell, and a photovoltaic module. The solar cell includes a substrate, a doped semiconductor layer, a passivation layer and a plurality of electrodes. The substrate is provided with textured structures on a portion of a surface of the substrate. The doped semiconductor layer is disposed on the substrate. The solar cell further includes holes extending through the doped semiconductor layer, and corresponding to the textured structures, respectively, and a bottom of a respective hole exposes at least a portion of a corresponding textured structure. The passivation layer is formed over a surface of the doped semiconductor layer away from the substrate, fills the holes. The plurality of electrodes are arranged along a first direction, pass through the passivation layer and are in electrical contact with the doped semiconductor layer.