24 results about "Recombination current" patented technology

The invention provides a phosphorus emitter passivation structure and a preparation method thereof, the passivation structure comprises a phosphorus emitter, the phosphorus emitter comprises silicon, phosphorus, hydrogen, carbon and / or nitrogen, the surface of the phosphorus emitter is provided with a nano silicon oxide layer, the phosphorus emitter comprises an electric injection region and a doped region, the electric injection region is provided with a conductive layer at a corresponding position, and the doped region is provided with a conductive layer at a corresponding position. The conductive layer is used for being connected with a metal electrode, a passivation anti-reflection layer is arranged at the corresponding position of the doped region, and the carbon and / or nitrogen concentration of the electric injection region is higher than that of the electric injection region. Partitioned passivation is performed on the surface of the phosphorus emitter, and carbon and / or nitrogen atoms are introduced into the doped region, so that the interface passivation effect is improved; the electric injection region is not subjected to carbon and nitrogen doping and is not provided with a passive film, so that the influence of passivation on the contact resistivity is reduced; a conductive channel is introduced into the electric injection region for electric injection, so that the defect state of the phosphorus emitter can be further eliminated, and the recombination current is reduced.

The invention relates to the technical field of motor control in the intelligent power grid industry, and discloses a space vector control method for a twelve-phase permanent magnet synchronous motor flywheel energy storage system, a control circuit of the flywheel energy storage system relates to power electronic components such as various semiconductor field-effect tubes, and the space vector control method is used for high-precision control of a motor. Comprising the steps of S1, twelve-phase space vector decoupling fault-tolerant control, S2, high-order harmonic energy recovery closed loop, S3, quantum annealing parameter optimization layer, S4, flux linkage adaptive observer network construction and S5, 18-dimensional switching vector table construction. According to the scheme, through multi-reference coordinate system transformation and a redundant phase reconstruction algorithm, rapid fault-tolerant response of the twelve-phase motor during a single-phase or two-phase fault is realized, a current path is dynamically recombined during the fault, a negative-sequence current compensation ring is combined, torque ripple is effectively suppressed, and the reliability of the motor is improved under a high-speed charging and discharging working condition. The harmonic distortion rate is detected in real time through the sliding window FFT, the bandwidth of the controller is adjusted, and the problem that the dynamic response of a traditional fault-tolerant strategy is insufficient is solved.

This application discloses a method and apparatus for constructing a parallel current source model for IGBT turn-off current analysis. The main scheme is as follows: Based on the physical nature of the IGBT turn-off current decrease process, it is revealed that it includes two synchronously occurring sub-processes (the carrier injection process and the carrier recombination reduction process corresponding to MOSFET turn-off); the IGBT turn-off current is defined as the parallel superposition of the currents (injection current and recombination current) generated by these two sub-processes; this abstract "dual current" physical theory is transformed into an equivalent circuit composed of a controlled source and a current source connected in parallel; the two sub-processes are analyzed in this way: for the first sub-process, a first relationship characterizing the dynamic evolution law of the injection current is derived; for the second sub-process, a second relationship characterizing the dynamic evolution law of the recombination current is derived; finally, by combining these two relationships, a parallel current source model for quantitatively characterizing the IGBT turn-off current decrease process is constructed.

The present application relates to the technical field of photovoltaics. Provided are a solar cell and a photovoltaic module. The solar cell comprises: a silicon substrate, which comprises a first surface and a second surface opposite each other; an N-type doped layer, which is located on at least a portion of the first surface of the silicon substrate, wherein the sheet resistance of the N-type doped layer ranges from 14 Ohms per square to 40 Ohms per square; and several N-type collector grid lines, which are distributed at intervals and in parallel, and are located on the side of the N-type doped layer that faces away from the silicon substrate, wherein the spacing between adjacent N-type collector grid lines is less than 1.391 mm. In the present application, the sheet resistance of an N-type doped layer ranges from 14 Ohms per square to 40 Ohms per square, and the spacing between adjacent N-type collector grid lines is less than 1.391 mm, such that factors such as parasitic absorption, a recombination current in a metal region, and a lateral resistance can achieve a better balance, resulting in a better performance of the solar cell and a higher photoelectric conversion efficiency.

The application provides a TOPCon cell, which comprises a doped polysilicon layer; the doped polysilicon layer comprises a first doped polysilicon region and a second doped polysilicon alloy region; the first doped polysilicon region is selected from phosphorus-doped polysilicon; the second doped polysilicon alloy region is selected from phosphorus-doped polysilicon alloyed with at least one element selected from oxygen, carbon and nitrogen; the doping concentration of the first doped polysilicon region is not less than 1E20 cm ‑3 -3; the band gap of the second doped polysilicon alloy region is greater than that of the first doped polysilicon region, and the doping concentration of the second doped polysilicon alloy region is less than that of the first doped polysilicon region. The TOPCon cell structure provided by the application can ensure the thickness of the doped polysilicon in the metal contact region, avoid the destruction of the tunneling oxide layer in the slurry sintering process, reduce the recombination current and the contact resistance, and reduce the light parasitic absorption in the non-metal region, especially the free carrier absorption.

The application provides a TOPCon cell, comprising: a single crystal silicon wafer; an inner expansion layer arranged on the back surface of the single crystal silicon wafer; a doped polysilicon layer arranged below the inner expansion layer; the doped polysilicon layer comprises: a first doped polysilicon region and a second doped polysilicon region, the doping concentration of the first doped polysilicon region is higher than that of the second doped polysilicon region; the inner layer comprises: a first inner expansion region and a second inner expansion region, the position of the first inner expansion region corresponds to the position of the first doped polysilicon region, and the junction depth of the first inner expansion region is greater than that of the second inner expansion region. The TOPCon cell provided by the application has a specific structure, which can ensure the thickness and concentration of the doped polysilicon in the metal contact area, avoid the destruction of the tunneling oxide layer in the slurry sintering process, reduce the recombination current and the contact resistance, and at the same time, reduce the light parasitic absorption of the non-metal area, especially the free carrier absorption.

The present invention belongs to the field of crystalline silicon solar cells and relates to a heterojunction solar cell and a preparation method thereof. Aiming at the technical problems of imperfect design of the P-type doping layer in the prior art of heterojunction solar cells, such as poor thermal stability of the P-type doping layer resulting in easy diffusion of B atoms into the amorphous silicon intrinsic layer, low optical bandgap width of the P-type doping layer formed by doping with pure diborane gas, and increased defect state density and emitter recombination current density of boron-doped amorphous silicon due to doping with high-concentration diborane gas. This solution provides a heterojunction solar cell and a preparation method thereof. By designing the P-type doping layer into a laminated structure, including a first P-type doping layer deposited with trimethylboron gas in contact with the intrinsic amorphous silicon layer, and at least two overall laminated structures with increasing boron doping concentration deposited with trimethylboron and diborane gas, the preparation steps are simple and the cost is low, and the obtained heterojunction solar cell has excellent performance.

The present invention relates to a method for characterizing and testing ionizing radiation damage to silicon-on-insulator (SOI) field-effect transistors (FETs). This method belongs to the technical field of quantitative radiation damage testing for semiconductor devices and addresses the technical problem of inaccurate measurement of the peak recombination current before and after total-dose radiation exposure in SOI devices. The method includes testing positive-gate and back-gate transfer characteristic curves, testing the relationship curve between body-terminal recombination current and back-gate voltage, testing total-dose radiation effects and post-irradiation parameters, extracting back-gate depletion voltage using a mid-band voltage method, determining the peak recombination current increment, separating oxide trap charges, and fitting and extracting the average surface density of the trapped charges. This characterization and testing method is used to quantitatively reveal the average surface density of radiation-induced oxide trap charges and interface traps in SOI FETs.

The application belongs to the technical field of semiconductor devices, and discloses a bidirectional conduction longitudinal structure diode and a preparation method thereof. The diode provided by the application has an anode, a cathode and an organic-inorganic heterojunction. The area covered by the anode is a P-type semiconductor layer of the heterojunction, which is composed of a DPPT-TT film formed by coating an undoped intrinsic DPPT-TT solution. The area covered by the cathode is an N-type semiconductor layer of the heterojunction, which is a silicon wafer doped with 10 19 (cm ‑3 ) phosphorus atoms. The anode uses copper as a contact material, and the cathode is an indium wafer. By introducing a new tunnel recombination current mode, the charge transport capacity is enhanced. This new heterojunction structure effectively improves the injection and transmission process of carriers at the electrode, significantly reducing the contact resistance. This electrode modification scheme not only improves the conductivity of the device, but also improves the overall energy transmission efficiency.

The invention relates to the technical field of solar cells, in particular to a solar cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic system. In the embodiment of the invention, a first tunneling oxide layer and a passivation dielectric layer are sequentially stacked on a first surface of a substrate, and the first tunneling oxide layer is at least partially contacted with the first surface. The laminated structure is formed by the first tunneling oxide layer and the passivation dielectric layer, and the passivation dielectric layer at least comprises the transparent conductive oxide layer, so that under the mutual cooperation of the first tunneling oxide layer and the transparent conductive oxide layer, not only can a good surface passivation effect be formed, but also parasitic absorption can be reduced, migration of carriers is facilitated, and the performance of the device is improved. Therefore, the current carrier recombination current density is reduced, and the conversion efficiency of the solar cell is improved.

The present invention provides a radiation-resistant high-voltage longitudinal triode structure, which comprises a second-conductivity-type emitter region, a first-conductivity-type well region, a second-conductivity-type well region, a second-conductivity-type buried layer region, a first-conductivity-type substrate, a first-conductivity-type segmented injection region, a shallow trench isolation oxide layer, a second-conductivity-type emitter injection region, a first-conductivity-type base injection region, a second-conductivity-type collector injection region, an emitter metal electrode, a base metal electrode, and a collector metal electrode. The present invention introduces a highly doped P-type region on the surface of one side of the emitter junction base region, thereby weakening the influence of total-dose radiation-induced trapped charges on the emitter junction injection efficiency, thereby preventing the increase of base region surface recombination current and suppressing the degradation of the device's common-emitter current amplification factor. In addition, the highly doped P-type injection on the surface of one side of the emitter junction base region adopts a segmented structure in the z-axis direction, thereby weakening the decrease in the initial common-emitter current amplification factor of the triode.

This invention discloses a P + -v-N + A novel mercury cadmium telluride mesa heterojunction infrared detector and its fabrication method, utilizing liquid-phase epitaxy to achieve P + -v material structure fabrication: N is prepared on the surface of the v-shaped layer using a back-implantation method. + After annealing, a three-layer hetero-doped material structure was fabricated, and P was then fabricated using device fabrication technology. + -v-N + This invention relates to a P-type mercury cadmium telluride mesa heterojunction detector. It utilizes the P-type wide-bandgap heterolayer growth process to achieve interfacial interdiffusion, reducing interface defect density and improving interface quality. Based on the ability to control raw material impurities above 7N and the self-purification characteristics of the growth process, it achieves stable control of low-concentration V-type layer impurities. Furthermore, it utilizes a high-resistivity transition layer formed by epitaxy and N-type metallurgical layer formed by boron ion implantation. + Layer; RTP fast annealing is used to repair injection damage. This invention can effectively suppress recombination current. Its surface heteromaterial forms a band modulation structure that suppresses tunneling current and surface leakage current. Compared with P-on-n devices, it can theoretically reduce dark current by two orders of magnitude and improve device performance.

The invention relates to the technical field of solar cells, in particular to a solar cell and a preparation method thereof.The solar cell comprises a substrate, a front passivation layer, a back passivation layer, an N-type doping layer and a P-type doping layer; the front passivation layer is formed on the front surface of the substrate; the back passivation layer is formed on the back; the N-type doping layer is formed on the front passivation layer; the P-type doping layer comprises an in-situ doping layer and a gradient doping layer, the in-situ doping layer is formed on the back passivation layer, and the gradient doping layer is formed on the in-situ doping layer; the doping concentration of the in-situ doping layer is smaller than the doping concentration of the gradient doping layer. According to the solar cell, unexpected tunneling current or interface recombination current can be weakened, the problem of reverse breakdown risk of a PN junction under a high electric field is solved, the problem of damage to a passivation layer of the cell is further solved, the performance of the passivation layer and a doping layer of a cell piece is improved, the reliability of the solar cell is improved, and the yield of the solar cell is increased.

This invention provides a TOPCon battery structure with two polycrystalline silicon layers and its fabrication method, relating to the field of battery processing technology. The TOPCon battery structure includes a monocrystalline silicon wafer, with a diffusion layer, a passivation layer, a front antireflection layer, and a front metal electrode sequentially disposed on the front side of the monocrystalline silicon wafer, and a tunneling layer, a doped polycrystalline silicon layer, a back antireflection layer, and a back metal electrode sequentially disposed on the back side of the monocrystalline silicon wafer. The doped polycrystalline silicon layer includes a first doped polycrystalline silicon layer located on the back side and a second doped polycrystalline silicon layer located between the back metal electrode and the first doped polycrystalline silicon layer, wherein the doping concentration of the second doped polycrystalline silicon layer is greater than that of the first doped polycrystalline silicon layer. This invention overcomes the shortcomings of existing technologies, ensuring the thickness of the doped polycrystalline silicon in the metal contact area, preventing damage to the tunneling oxide layer during sintering, and reducing recombination current and contact resistance; simultaneously, it reduces photoparasitic absorption in the non-metallic region, especially reducing free carrier absorption.

The application relates to the field of motor control technology in the smart grid industry, and a control circuit of a flywheel energy storage system involves various power electronic components such as semiconductor field effect tubes, and serves high-precision control of a motor; the application discloses a space vector control method for a twelve-phase permanent magnet synchronous motor flywheel energy storage system, which comprises the following steps: S1, twelve-phase space vector decoupling fault-tolerant control, S2, high-order harmonic energy recovery closed loop, S3, quantum annealing parameter optimization layer, S4, flux linkage self-adaptive observer network, and S5, 18-dimensional switching vector table construction. Through multi-reference coordinate system transformation and redundant phase reconstruction algorithm, the scheme realizes quick fault-tolerant response of the twelve-phase motor under single-phase or two-phase fault, dynamically recombines a current path under fault, combines a negative sequence current compensation loop, effectively suppresses torque pulsation, and through sliding window FFT real-time detection of a harmonic distortion rate and adjustment of a controller bandwidth under high-speed charging and discharging conditions, the problem of insufficient dynamic response of a traditional fault-tolerant strategy is solved.

The utility model discloses a solar cell, which is applied to the technical field of cells and comprises a substrate; the substrate comprises a grid line area and a non-grid line area; the front face of the grid line area is provided with a first suede face and an impurity diffusion layer, and the impurity diffusion layer is electrically connected with the front face grid lines; the front face of the non-grid line area is provided with a second suede face, the non-grid line area is lower than the grid line area, and the front face of the non-grid line area is not provided with an impurity diffusion layer. According to the utility model, the first suede and the second suede are respectively arranged on the front surface of the grid line area and the front surface of the non-grid line area, so that the light trapping capability of the cell can be improved; meanwhile, the impurity diffusion layer is arranged on the front face of the grid line area to form the local emitting electrode, and the impurity diffusion layer is not arranged on the front face of the non-grid line area, so that the height difference is formed between the local emitting electrode and the non-grid line area, the overall doping concentration of the substrate is effectively reduced, the front face recombination current density can be reduced, and the cell open voltage is improved.

This invention discloses a TOPCon battery and its fabrication method, belonging to the field of TOPCon battery technology. It includes a monocrystalline silicon wafer with a tunneling layer, a doped polycrystalline silicon layer, a back anti-reflection layer, and a back metal electrode sequentially disposed on its back side from the inside out. The doped polycrystalline silicon layer includes a first doped polycrystalline silicon region and a second doped polycrystalline silicon region. The first doped polycrystalline silicon region is in contact with the back metal electrode and is disposed on the surface of a groove. The tunneling oxide layer is relatively thin, and the inward junction depth is greater than that of the second doped polycrystalline silicon region. This effectively prevents electrode metal from penetrating into the junction region, reduces metal recombination current, and improves the battery's open-circuit voltage. Furthermore, the first doped polycrystalline silicon region has a larger contact area with the printing paste, reducing the battery's contact resistance. Simultaneously, the groove prevents the printing paste from widening outward, ensuring a high grid line aspect ratio, reducing grid line resistance, and thus improving the battery's fill factor.

The invention relates to a solar blind ultraviolet detector and a manufacturing method thereof. The solar blind ultraviolet detector sequentially comprises a back electrode, a P-type silicon carbide substrate, a first tunneling oxide layer, an i-type wide band gap material layer, a second tunneling oxide layer, an N-type gallium oxide layer and a surface electrode. The P-type silicon carbide substrate, the i-type wide band gap material layer and the N-type gallium oxide layer form a pin heterojunction, electrons and holes can be limited in the i-type wide band gap material layer, and carrier collection is facilitated. Moreover, the first tunneling oxide layer can effectively inhibit the interface state between the P-type silicon carbide substrate and the i-type wide bandgap material layer, and the second tunneling oxide layer can effectively inhibit the interface state between the i-type wide bandgap material layer and the N-type gallium oxide layer, thereby reducing the non-radiative recombination of carriers between the interfaces, and improving the performance of the device. The interface recombination current (the main source of the dark current) is significantly inhibited, the dark current is significantly reduced, and the detection sensitivity and the signal-to-noise ratio are improved.

This invention provides a P-type passivated contact structure and its preparation method. The P-type passivated contact structure includes a silicon substrate, a first silicon oxide layer, a first polycrystalline silicon layer, a second polycrystalline silicon layer, and a hydrogen-containing dielectric layer. The silicon substrate has a diffusion region near the surface of the first silicon oxide layer. The surface of the first silicon oxide layer near the first polycrystalline silicon layer has a native pinhole defect structure generated by plasma bombardment. The first polycrystalline silicon layer is made of carbon-doped boron-containing polycrystalline silicon, wherein the boron and carbon doping concentrations gradually increase away from the first silicon oxide layer, and the thickness is greater than or equal to 8 nm. The second polycrystalline silicon layer is also made of carbon-doped boron-containing polycrystalline silicon, with a thickness greater than 10 nm. The interfacial silicon oxide surface of this invention has a high density of pinhole defects, and using carbon-doped boron-containing amorphous silicon as the source layer can reduce oxide layer defects caused by interfacial boron enrichment, achieving excellent surface passivation and selective carrier collection, and reducing surface recombination current density.

The present invention relates to the field of semiconductor technology, and provides a method and system for testing interface defects in semiconductor devices. The method comprises: applying a pulse voltage signal with a rising edge and a falling edge to the gate of the semiconductor device; during the rising edge phase, the interface defects capture minority carriers; and in a time period where the capture time is less than the rising edge time, detecting in real time the substrate current generated by the minority carriers captured by the interface defects; during the falling edge phase, the interface defects release minority carriers; and in a time period where the release time is less than the falling edge time, detecting in real time the recombination current generated by the minority carriers released by the interface defects and the majority carriers; and calculating, based on the substrate current and recombination current detected in real time, the density of interface defects where the capture time is less than the rising edge time and the release time is less than the falling edge time. The present invention can achieve accurate characterization of interface defects with different time constants under a specified bias voltage by regulating the values of the rising edge and falling edge times.

The invention discloses an anti-radiation high-voltage BJT (Bipolar Junction Transistor) device and a manufacturing method thereof, and belongs to the technical field of semiconductor power devices. The device comprises a P-type substrate, an N-type buried layer, an N-type deep well, a P-type deep well, a shallow trench isolation oxide layer, an N-type well region, an N-type emitter region, a P-type well region, a P-type highly doped region, an N-type collector injection region, an N-type emitter injection region, a P-type base injection region, collector metal, base metal and emitter metal. According to the method, the mask plate of the P-type well region is repeatedly utilized, the P-type highly doped region is introduced to the surface of the P-type well region, and the influence of trap charges of an oxide layer caused by total dose radiation on the surface of the base region is weakened, so that the phenomenon that a depletion region appears on the surface of the base region to cause the increase of recombination current is prevented, and the degradation of a common emitter current amplification coefficient of a device is inhibited; meanwhile, the device can be manufactured without additionally arranging a mask plate, so that the anti-radiation capability can be reinforced, and the manufacturing cost of the device can be saved at the same time.

The invention provides a boron emitter passivation structure and a preparation method thereof.The passivation structure comprises a boron emitter, the boron emitter comprises silicon, boron, carbon and hydrogen, a nano silicon oxide layer is arranged on the surface of the boron emitter, the boron emitter comprises an electric injection region and a doped region, a conductive layer is arranged at the corresponding position of the electric injection region, and the doped region is arranged on the surface of the nano silicon oxide layer. The conductive layer is used for being connected with a metal electrode, a passivation anti-reflection layer is arranged at the corresponding position of the doped region, and the carbon concentration of the doped region is higher than that of the electric injection region. According to the invention, a partitioned passivation technology is adopted, and carbon is introduced into the doped region of the boron emitter, so that an excellent passivation effect can be realized, and surface recombination is reduced; the electric injection region is not doped with carbon and is not provided with a passive film, so that the contact resistivity of the metal electrode is improved; a conductive channel is introduced into the electric injection region for electric injection, so that the defect state of the boron emitter can be further eliminated, and the recombination current is reduced.

The application discloses a solar cell, a preparation method of the solar cell, a laminated cell and a photovoltaic module, and belongs to the technical field of semiconductors. The solar cell comprises a semiconductor substrate and a first locally heavily doped semiconductor layer located on a main surface of the semiconductor substrate. The first locally heavily doped semiconductor layer has the same or opposite conductivity type as the semiconductor substrate, and the doping concentration of an edge region of the first locally heavily doped semiconductor layer is higher than that of a central region. The doping concentration of the first locally heavily doped semiconductor layer is optimized and designed, so that the doping concentration of the edge region is higher than that of the central region, thereby effectively inhibiting the serious carrier recombination phenomenon existing at the edge of the contact window of the locally doped semiconductor layer, fundamentally strengthening the field effect passivation ability of the edge, and effectively reducing the edge recombination current density to a very low level and improving the open circuit voltage and the fill factor of the cell.

The invention provides a dark current reduced photoelectric detector chip and a preparation method thereof. The dark current reduced photoelectric detector chip comprises an anode, a P-type contact layer, an absorption layer, a transition layer, an N-type contact layer and a cathode, the anode, the P-type contact layer, the absorption layer, the transition layer and the N-type contact layer are sequentially stacked; the zinc diffusion depth completely covers the P-type contact layer and a part of the absorption layer. By applying the technical scheme, the size of the recombination current generated by the device can be reduced in the effective working range of the photoelectric detector, and finally the total dark current of the photoelectric detector is effectively reduced.