Convolutional neural network feature decoding system realized based on FPGA

Abstract

The invention relates to the technical field of computer vision, in particular to a convolutional neural network feature decoding system based on FPGA implementation. According to the system, a feature decoding module of the CNN network is also placed in the FPGA for acceleration, the problem that feature extraction and feature decoding rates are not matched in an FPGA acceleration scheme is solved, all functions are realized in the FPGA, namely, the acceleration effect completely depends on the performance of the FPGA, and the maximization of the acceleration effect of the FPGA can be achieved as long as the functions of the two parts are completely designed in a streamlined manner. And meanwhile, a feature extraction result is directly processed in the chip without DDR cache, so that thetime delay of CNN network processing is reduced, and even the CNN network can be accelerated completely without a processor, and a chip-level calculation acceleration effect is achieved.

Description

technical field [0001] The present invention relates to the technical field of computer vision, in particular to a convolutional neural network feature decoding system implemented based on FPGA. Background technique [0002] The current convolutional neural network (CNN) has been widely used in computer vision, industrial inspection, natural language processing and other fields. However, limited by the huge amount of calculation and storage requirements of the convolutional neural network, traditional general-purpose processors have long been unable to meet its real-time requirements, so based on graphics processing units (GPUs), application-specific integrated circuits (ASICs) and field programmable gates CNN accelerators on hardware platforms such as arrays (FPGA) have been proposed one after another. Comprehensively comparing these hardware platforms, the FPGA-based CNN accelerator has the advantages of short development cycle, high energy efficiency and high reconfigura...

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned technical problems, the present invention provides a convolutional neural network feature decoding system based on FPGA, which also puts the feature decoding module of CNN network inside FPGA for acceleration, and solves the feature extraction encountered in the FPGA acceleration scheme The problem that does not match the feature decoding rate

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