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Battery pack equalization circuit and equalization method thereof

A technology of balancing circuit and battery pack, applied in charge balancing circuit, battery circuit device, charging/discharging of secondary battery, etc., can solve the problems of reducing battery energy utilization efficiency and small balancing current, etc.

Pending Publication Date: 2021-01-15
HUBEI JINQUAN NEW MATERIALS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Part of the equalization path needs to be realized through the parasitic diode of the MOSFET transistor. However, due to the existence of the parasitic diode of the MOSFET transistor, it will form a loop with some batteries. The equalization path formed by the parasitic diode of the MOSFET transistor has a small equalization current, which directly reduces Battery Energy Utilization Efficiency

Method used

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  • Battery pack equalization circuit and equalization method thereof
  • Battery pack equalization circuit and equalization method thereof
  • Battery pack equalization circuit and equalization method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0025] figure 1 It is a schematic structural diagram of a battery pack balancing circuit provided in Embodiment 1 of the present invention. refer to figure 1 , the battery pack balancing circuit includes at least one balancing circuit unit 10, the balancing circuit unit 10 includes: a first terminal A1, a second terminal A2 and a third terminal A3; The first switch 11 and the second switch 12 are connected to the inductive element L0 between the common connection terminal of the first switch 11 and the second switch 12 and the third terminal A3;

[0026] The balancing circuit unit 10 is connected to at least two batteries connected in series, such as figure 1 The first battery B1 and the second battery B2 connected in series, the first end A1 of the equalizing circuit unit 10 is connected to the positive pole of one battery B1, and the second end A2 of the equalizing circuit unit 10 is connected to the negative pole of another battery B2; The number of batteries connected b...

Embodiment 2

[0032] figure 2 It is a schematic structural diagram of a battery pack balancing circuit provided in Embodiment 2 of the present invention. On the basis of the first embodiment above, refer to figure 2 , the first switch 11 includes a first transistor M1 and a second transistor M2 connected in series, the first end of the first transistor M1 is electrically connected to the first end A1 of the equalization circuit unit 10, and the second end of the first transistor M1 is electrically connected to the first end A1 of the equalization circuit unit 10. The first ends of the second transistor M2 are electrically connected, and the second end of the second transistor M2 is electrically connected to the second switch 12 .

[0033] Wherein, the control states of the first transistor M1 and the second transistor M2 are turned on or turned off at the same time. Thus, it can be ensured that the first switch 11 is completely turned on or completely turned off.

[0034] Optionally, con...

Embodiment 3

[0050] image 3 It is a schematic structural diagram of a battery pack balancing circuit provided in Embodiment 3 of the present invention. On the basis of the above examples, refer to image 3 , the battery pack equalization circuit includes three equalization circuit units, such as image 3 In the first balance circuit unit 101, the second balance circuit unit 102 and the third balance circuit unit 103, the three balance circuit units are connected to at least four batteries connected in series, such as the first battery B1, The second battery B2, the third battery B3 and the fourth battery B4, wherein the first end of the first equalizing circuit unit 101 is connected to the positive pole of the first battery B1, and the second end of the first equalizing circuit unit 101 terminal is connected to the negative pole of the second battery B2; the first end of the second equalizing circuit unit 102 is connected to the positive pole of the third battery B3, and the second end ...

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Abstract

The embodiment of the invention discloses a battery pack equalization circuit and an equalization method thereof. The battery pack equalization circuit comprises at least one equalization circuit unit, wherein each equalization circuit unit comprises a first end, a second end and a third end; a first switch and a second switch are connected between the first end and the second end in series, and an inductive element is connected between the common connection end of the first switch and the second switch and the third end. The equalization circuit unit is connected with at least two batteries connected in series, the first end of the equalization circuit unit is connected with the anode of one battery, and the second end of the equalization circuit unit is connected with the cathode of theother battery; the number of the batteries connected between the first end and the second end of the equalization circuit unit is an even number, the third end of the equalization circuit unit is connected with a common connection electrode of the two batteries between the first end and the second end, and the number of the batteries spaced between the first end and the third end is equal to the number of the batteries spaced between the second end and the third end. The effect of improving the utilization efficiency of battery energy is achieved.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of battery management, and in particular to a battery pack equalization circuit and an equalization method thereof. Background technique [0002] In order to conform to the scientific and practical concept and the development concept of efficient energy utilization, in the field of battery management technology, the utilization efficiency of battery energy is improved by designing a balance circuit. [0003] The existing equalization circuit design is usually a multi-criteria inductive active equalization circuit, which mainly uses inductance as the energy transfer medium, and uses a single MOSFET transistor to control the on-off of the equalization path. Part of the equalization path needs to be realized through the parasitic diode of the MOSFET transistor. However, due to the existence of the parasitic diode of the MOSFET transistor, it will form a loop with some batteries. The eq...

Claims

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Application Information

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IPC IPC(8): H02J7/00H01M10/44
CPCH02J7/0016H02J7/0019H01M10/441Y02E60/10
Inventor 黄伟罗达逸
Owner HUBEI JINQUAN NEW MATERIALS CO LTD
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