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Method and device for scheduling delay-sensitive traffic in line route

A delay-sensitive and traffic-sensitive technology, applied in the field of network communication, which can solve problems such as the impracticality of offline methods

Active Publication Date: 2021-01-15
BEIJING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above offline scheme requires that all delay-sensitive traffic be known, and it takes hours to days to synthesize the scheduling configuration scheme, which makes this offline method impractical for practical deployment

Method used

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  • Method and device for scheduling delay-sensitive traffic in line route
  • Method and device for scheduling delay-sensitive traffic in line route
  • Method and device for scheduling delay-sensitive traffic in line route

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Embodiment Construction

[0044] Embodiments of the present application are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary, and are intended to explain the present application, and should not be construed as limiting the present application.

[0045] At present, the offline scheme adopts the no-wait packet scheduling model, joint routing for delay-sensitive traffic scheduling, modeled by integer linear programming, and uses a series of constraints to ensure that delay-sensitive traffic is transmitted on time slots or spatial routes Do not interfere with each other, and use the CPLEX parser to solve the problem, and explore the influence of network topology size, topology type, flow quantity, and flow packet sending cycle on the synthesis time of the scheduling conf...

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Abstract

The invention provides a method and device for scheduling time delay sensitive traffic in a line route, and the method comprises the steps: determining the minimized packet sending transmission starttime corresponding to to-be-sent time delay sensitive traffic; obtaining all simple paths, and calculating the weight of each simple path; arranging the simple paths from small to large according to the weights to obtain an ordered path set; converting a first path in the ordered path set into an edge set composed of nodes; judging whether an edge overlapped with the issued path exists in the edgeset or not; if so, determining whether each flow meets the constraint conditions that the flows do not conflict with each other and only one flow is transmitted on each edge of each time slot when the flows are transmitted on the corresponding time slot; if so, generating a gating list according to the occupied time slot and the minimized packet sending transmission starting time; issuing the gating list to the switch, and returning the packet sending transmission starting time to the sending end. Therefore, the number of schedulable flows can be increased, and the synthesis time of the scheduling configuration scheme can be reduced.

Description

technical field [0001] The present application relates to the technical field of network communication, and in particular to a method and device for online routing and scheduling delay-sensitive traffic. Background technique [0002] In many Cyber ​​Physical Systems (CPS for short), such as industrial automation and in-vehicle network systems, traditional bus-based proprietary network technologies may not be able to meet the high bandwidth and deterministic latency requirements of real-time applications. Currently, standard Ethernet can meet the above-mentioned high bandwidth requirements. However, Ethernet was originally designed to only provide best-effort forwarding services, which will result in uncertain queuing delays. In order to meet the deterministic latency requirements and simultaneously transmit latency-sensitive traffic and best-effort traffic on the same network, it is urgent to improve the deterministic latency guarantee capability of Ethernet. Among them, de...

Claims

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Application Information

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IPC IPC(8): H04L12/721H04L12/727H04L12/841H04L45/121
CPCH04L45/124H04L45/121H04L47/28
Inventor 汪硕黄玉栋黄韬刘江刘韵洁
Owner BEIJING UNIV OF POSTS & TELECOMM
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