Semiconductor structure and method of forming same

Abstract

The present disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a substrate, a first device, a second device, a fin, a first gate dielectric layer, a second gate dielectric layer, and a cut region of the fin. The second device is adjacent to the first device. The fin is disposed on the substrate between the first device and the second device. The first gate dielectric layer is disposed on a first portion of the fin, and the second gate dielectric layer is disposed on a second portion of the fin. The cut region of the fin is formed within a trench between the first device and the second device.

Description

technical field [0001] This disclosure claims priority and benefit to US Formal Application No. 16 / 514327 filed 2019 / 07 / 17, the contents of which are hereby incorporated by reference in their entirety. [0002] The present disclosure relates to a semiconductor structure and a manufacturing method thereof. In particular, it relates to the structure of multiple fins with a cutting area in a trench between adjacent elements and methods of making the same. Background technique [0003] A semiconductor integrated circuit (IC) has a very large number of circuit elements in a limited wafer area. The semiconductor integrated circuit industry has experienced continuous and rapid growth due to the continuous increase in the integration density of various electronic components. To a large extent, these increases in integration density have resulted from repeated reductions in minimum feature size, which has enabled more components to be integrated into a given area. Since the area o...

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Problems solved by technology

Furthermore, as the specifications continue to decrease, it becomes increasingly difficult to control the threshold voltages of adjacent FinFET devices

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