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Semiconductor packages and methods of manufacturing the same

A technology for semiconductors and packages, applied in the field of fan-out semiconductor packages and its manufacturing, which can solve problems such as interference of I/O terminals

Pending Publication Date: 2021-01-29
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Specifically, in a highly integrated semiconductor chip having an increasing number of input / output (I / O) terminals, the distance between the I / O terminals decreases, and therefore, the distance between the I / O terminals decreases. Interference occurs

Method used

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  • Semiconductor packages and methods of manufacturing the same
  • Semiconductor packages and methods of manufacturing the same
  • Semiconductor packages and methods of manufacturing the same

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0018] Hereinafter, example embodiments will be described with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same elements, and redundant descriptions thereof may be omitted.

[0019] figure 1 is a cross-sectional view of a semiconductor package 10 according to example embodiments of inventive concepts. figure 2 Yes figure 1 Enlarged cross-sectional view of Region II in .

[0020] refer to figure 1 and figure 2 , the semiconductor package 10 may include the redistribution structure 101 , the semiconductor chip 200 , the conductive pillars 160 and the molding layer 250 .

[0021] The redistribution structure 101 may include a redistribution insulating layer 110, a plurality of redistribution patterns (eg, a first redistribution pattern 120, a second redistribution pattern 130, and a third redistribution pattern 140), and an external electrode pad (external electrode pad, or "external electrode pads") 150 .

[0022] The ...

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PUM

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Abstract

The invention provides a semiconductor packages and methods of manufacturing the same. The semiconductor packages may include a semiconductor chip including a chip pad and a lower redistribution thatincludes a lower redistribution insulating layer and a lower redistribution pattern. The lower redistribution insulating layer may include a top surface facing the semiconductor chip. The semiconductor packages may also include a molding layer on a side of the semiconductor chip and including a bottom surface facing the lower redistribution structure and a conductive post in the molding layer. Theconductive post may include a bottom surface contacting the lower redistribution. The top surface of the lower redistribution insulating layer may be closer to a top surface of the conductive post than a top surface of the molding layer. A roughness of the top surface of the molding layer may be greater than a roughness of the top surface of the conductive post.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2019-0088519 filed in the Korean Intellectual Property Office on July 22, 2019, the disclosure of which is incorporated herein by reference in its entirety. technical field [0002] The inventive concept relates to a semiconductor package and a method of fabricating the same, and more particularly, to a fan-out semiconductor package and a method of fabricating the same. Background technique [0003] With the rapid increase in demand for portable devices in the recent electronic product market, electronic components mounted on electronic products have been desired to be compact and light. In order to make the electronic assembly compact and light, the semiconductor package mounted on the electronic assembly can be small and can process a large amount of data. Specifically, in highly integrated semiconductor chips having an increasing number of input / output (I / O) terminals, the distance between the I / O...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L23/31H01L21/48H01L21/56
CPCH01L23/49816H01L23/49811H01L23/49838H01L23/3114H01L21/4853H01L21/4846H01L21/56H01L23/5389H01L23/3128H01L21/6835H01L2221/68345H01L21/568H01L21/561H01L2225/1023H01L2225/1058H01L2924/1533H01L2924/15311H01L2924/18161H01L2224/81005H01L2224/83005H01L2224/73204H01L2224/92125H01L2224/16238H01L2224/97H01L2224/73253H01L2224/0401H01L2224/131H01L2224/32225H01L2224/81447H01L2224/81466H01L2224/81481H01L2224/81471H01L2224/81424H01L24/32H01L24/13H01L24/16H01L24/81H01L24/92H01L24/97H01L25/0657H01L2225/06524H01L2225/06517H01L2225/06527H01L25/50H01L2224/83H01L2224/81H01L2924/014H01L2924/00014H01L2224/16225H01L2924/00H01L23/528H01L23/525H01L23/485H01L23/31H01L23/481H01L2224/02379H01L23/49822H01L23/3121H01L21/563H01L25/18H01L21/4857H01L21/486H01L24/05
Inventor 柳在冏李在银高永权李泽勳
Owner SAMSUNG ELECTRONICS CO LTD