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Test assembly and test method

A technology for testing components and testing methods, which is applied in semiconductor/solid-state device testing/measurement, electrical components, circuits, etc., and can solve problems such as the inability to accurately know the impact of plasma on the reliability of the gate dielectric and the damage of the gate dielectric.

Inactive Publication Date: 2021-03-09
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When there is a voltage unbalanced state, a current will be conducted to the gate dielectric through the metal, causing damage to the gate dielectric
[0003] In the traditional reliability evaluation of the gate dielectric, all the process factors that affect the reliability of the gate dielectric are mixed together, and it is impossible to know the impact of the plasma on the reliability of the gate dielectric.

Method used

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Embodiment Construction

[0035] The present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

[0036] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that the present invention will be more thoroughly understood, and will fully convey the scope of the present disclosure to those skilled in the art.

[0037] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of th...

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PUM

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Abstract

The embodiment of the invention discloses a test assembly and a test method. The test assembly comprises a substrate, a first test structure and a second test structure, wherein the first test structure and the second test structure are located on the substrate; the first test structure comprises a first to-be-tested device, and the first to-be-tested device comprises a first gate dielectric layerand a first gate layer located on the first gate dielectric layer; the second test structure comprises a second to-be-tested device, a first fuse and a diode; the second to-be-tested device comprisesa second gate dielectric layer and a second gate layer located on the second gate dielectric layer; the diode is conductively connected between the second gate layer and the substrate, and the firstfuse is conductively connected between the second gate layer and the diode; and the first to-be-tested device and the second to-be-tested device have the same structure prepared under the same processconditions.

Description

technical field [0001] The invention belongs to the field of semiconductors, and in particular relates to a test component and a test method. Background technique [0002] In the chip manufacturing process, plasma is used in many process steps. Plasma is a mixture of positive and negative ions and electrons. When there is a voltage imbalance, a current will be conducted to the gate dielectric through the metal, causing damage to the gate dielectric. [0003] In traditional reliability evaluation of gate dielectrics, all process factors that affect the reliability of gate dielectrics are mixed together, and the influence of plasma on the reliability of gate dielectrics cannot be accurately known. SUMMARY OF THE INVENTION [0004] In view of this, the embodiments of the present invention provide a test structure and a test method thereof to solve at least one problem existing in the background art. [0005] In order to achieve the above object, the technical scheme of the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66
CPCH01L22/12H01L22/30
Inventor 朱晓娟
Owner YANGTZE MEMORY TECH CO LTD