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Lightweight software debugging method for heterogeneous many-core processor

A technology for many-core processors and software debugging, applied in software testing/debugging, electrical digital data processing, instruments, etc., can solve the problems of high debugging technology costs, reduce time and space costs, and save computing resources

Active Publication Date: 2021-03-23
JIANGNAN INST OF COMPUTING TECH
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  • Abstract
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Problems solved by technology

[0006] The purpose of the present invention is to provide a lightweight software debugging method for heterogeneous many-core processors. This debugging technology can not only solve the debugging problem of heterogeneous many-core processors, but also solve the problem of excessive overhead of traditional debugging techniques.

Method used

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  • Lightweight software debugging method for heterogeneous many-core processor

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Embodiment

[0038] Embodiment: a kind of lightweight software debugging method for heterogeneous many-core processors, refer to the attached figure 1 , based on heterogeneous many-core processors, comprising the following steps:

[0039] S1: Input debugging command: input the unified syntax format of master core and slave core, and compatible multi-core debugging command;

[0040] Here, the debugging function is implemented according to the syntax format of the multi-core debugging tool, so that the master core and slave core on the heterogeneous chip support this syntax format, so that users can save learning time and master the debugging method while using the same syntax format.

[0041] S2: Address space positioning: According to the symbol table about debugging information provided by the compiler and the language, process the input debugging commands, and convert the source-level symbols into logical addresses in the process address space;

[0042] Among them, since the interfaces ...

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Abstract

The invention discloses a heterogeneous many-core processor-oriented lightweight software debugging method. Based on a heterogeneous many-core processor, the method comprises the following steps: S1,inputting of a debugging command: inputting a unified grammar format of a master core and a slave core, and being compatible with a multi-core debugging command; S2, address space positioning: processing an input debugging command according to a symbol table about debugging information provided by a compiler and a language, and converting a source code level symbol into a logic address in a process address space; S3, executing control; S4, debugging interrupt processing; S5, debugging signal processing; S6, program field processing: the debugger process realizes consistent debugging of the master core and the slave core according to the segmented debugging information of the unified logic address space of the many-core program and a unified thread debugging queue. According to the method,the requirement of heterogeneous many-core software debugging is met, the debugging overhead is reduced, and operation resources are effectively saved.

Description

technical field [0001] The invention belongs to the technical field of optimization of heterogeneous many-core processors, in particular to a lightweight software debugging method for heterogeneous many-core processors. Background technique [0002] In the multi-core processor software ecosystem, parallel development adopts a shared programming model, and the multi-thread sharing method is specified through pragmas. The OS (operating system) provides a standard debugging interface for processes and threads, and commercial and open source debugging tools Both can support the debugging of multi-core parallel programs. [0003] At present, the domestic Shenwei many-core processor integrates a small number of master cores and a large number of slave cores. The operating system runs on the master core, and the streamlined slave core does not run the operating system. The compiler connects the master core instructions and slave core instructions generated by compilation in a unif...

Claims

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Application Information

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IPC IPC(8): G06F11/36G06F9/50
CPCG06F11/3672G06F9/5027G06F9/5066
Inventor 彭达佳王敬宇刘勇陈华蓉宋佳伟冯赟龙孙川罗威张威梁艳
Owner JIANGNAN INST OF COMPUTING TECH
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