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Cell structure, resistive memory and method for generating security key

A technology of resistive memory and security key, which is applied to encryption device with shift register/memory and key distribution, which can solve the problems of device reading interference and easy access to password information by external attacks.

Active Publication Date: 2022-04-12
PEKING UNIV
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] When traditional RRAM is used as a PUF application, data is mostly read by comparing the resistance value difference of two RRAM devices, but this method is easily affected by device retention characteristics or device read interference, and because information is directly stored in In the resistance value of the array, the password information is easily obtained by external attacks

Method used

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  • Cell structure, resistive memory and method for generating security key
  • Cell structure, resistive memory and method for generating security key
  • Cell structure, resistive memory and method for generating security key

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Embodiment Construction

[0036]The present disclosure provides a unit structure, a resistive variable memory and a method for generating a security key, using the setting process of two parallel RRAM units connected in series with a capacitor to generate random numbers and random number sequences, and the generated random numbers or random numbers Sequences can be used to implement physical unclonable functions, which in turn can be used in hardware security applications, avoiding the problem that stored data is vulnerable to attacks caused by storing random numbers in the form of resistance.

[0037] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. In this disclosure, "first input signal", "second input signal", "third input signal" and "fourth input signal" are for the convenience of describing the...

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Abstract

The invention discloses a unit structure, a resistance variable memory and a method for generating a security key. The unit structure includes: a parallel structure and a capacitor. The parallel structure includes first and second RRAM cells connected in parallel. The input end of the parallel structure is used to access the input signal. A capacitor is connected in series with the output of the parallel structure, said capacitor being grounded. Wherein, the setting voltages of the first RRAM unit and the second RRAM unit are different. It is possible to use the setting process of two parallel RRAM units connected in series with the capacitor to generate random numbers. The generated random numbers or random number sequences can be used to realize physical unclonable functions, and then used as security keys for hardware security, avoiding storage in the form of resistance The storage data caused by random numbers is vulnerable to attack.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductor devices and integrated circuits, and relates to a unit structure for generating a security key, a resistive memory and a method. Background technique [0002] Resistive RAM (RRAM) has natural and random fluctuations among RRAM devices due to its own conduction mechanism using conductive filaments. This natural and random variability between devices enables RRAM to be used to implement reliable Physical Unclonable Functions (PUFs) for hardware security applications. [0003] When traditional RRAM is used as a PUF application, data is mostly read by comparing the resistance value difference of two RRAM devices, but this method is easily affected by device retention characteristics or device read interference, and because information is directly stored in In the resistance value of the array, the password information is easily obtained by external attacks. Contents of the invention [0004...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/08H04L9/06H01L45/00
CPCH04L9/08H04L9/06H10N70/20
Inventor 康晋锋张逸舟田明刘晓彦黄鹏
Owner PEKING UNIV
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