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Persistent memory-based key-value pair storage system and data concurrent insertion method

A storage system and key-value pair technology, applied in database indexing, database updating, climate sustainability, etc., to improve performance and reduce conflict waiting overhead

Active Publication Date: 2022-07-12
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In order to solve the performance problem caused by using the lock mechanism in the multi-threaded mode of the storage system, the present invention proposes a key-value pair storage system based on persistent memory and a data concurrent insertion method

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  • Persistent memory-based key-value pair storage system and data concurrent insertion method
  • Persistent memory-based key-value pair storage system and data concurrent insertion method
  • Persistent memory-based key-value pair storage system and data concurrent insertion method

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Embodiment Construction

[0022] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0023] figure 1 (a) Represents the node structure of the conventional key-value pair storage system. As shown in the figure, a node consists of two parts, one part is a bitmap, and the other part is a key value pair array (key value pair array). The bitmap can identify whether the key-value pair at the corresponding position of the key-value pair array is valid; among them, 1 means that the key-value pair at the corresponding position is valid. figure 2 (a) is the operation process of the corresponding conventional lock mechanism. As shown in the figure, the operation process of the conventional lock mechanism is to lock, find the first bit position of 0 in the bitmap, write the key-value pair and persist it, Update the bitmap and persist it, release the lock. The order of writing the key-value pair and updating the bitmap cannot be modified. ...

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Abstract

The present invention proposes a key-value pair storage system based on persistent memory. Each node in the system includes a key-value pair array and two bitmaps with the same initialization value, which are respectively expressed as commitBM and shadowBM, wherein the shadowBM uses The insertion thread obtains the write space of the key-value pair array; the commitBM is used to update the key-value pair after writing to maintain consistency. The invention also provides a corresponding data concurrent insertion method, which can solve the performance problem caused by using the lock mechanism in the multi-thread mode of the key-value pair storage system. The scheme uses lock-free technology CAS (compare and swap) to modify critical data, and uses bitmap to identify valid key-value pairs, so as to realize concurrent insertion operations under lock-free conditions and reduce the conflict and waiting overhead between threads. , to improve the performance of the entire key-value storage system.

Description

technical field [0001] The invention relates to the technical field of computer science databases, in particular to a method for concurrently inserting data in a persistent memory-based key-value pair storage system. Background technique [0002] The emerging persistent memory (PM: persistent memory) has the characteristics of low latency, high capacity and no data loss after power failure, which greatly improves the performance of key-value storage systems. In order to meet growing business demands, storage systems often need to expand from a single-threaded mode to a multi-threaded mode to support requests from multiple clients at the same time. For multiple inserting threads at the same time, the existing solution is to use a lock mechanism to achieve concurrency control. However, the lock mechanism uses the lock and unlock method to manage critical resources. After a thread obtains the permission of the critical resource, other threads can only block and wait for it to ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F16/23G06F16/22
CPCG06F16/2308G06F16/2365G06F16/2237Y02D10/00
Inventor 何水兵李振鑫
Owner ZHEJIANG UNIV
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