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53 results about "Compare-and-swap" patented technology

In computer science, compare-and-swap (CAS) is an atomic instruction used in multithreading to achieve synchronization. It compares the contents of a memory location with a given value and, only if they are the same, modifies the contents of that memory location to a new given value. This is done as a single atomic operation. The atomicity guarantees that the new value is calculated based on up-to-date information; if the value had been updated by another thread in the meantime, the write would fail. The result of the operation must indicate whether it performed the substitution; this can be done either with a simple boolean response (this variant is often called compare-and-set), or by returning the value read from the memory location (not the value written to it).

Double word compare and swap implemented by using triple single word compare and swap

A Lock Free and Wait Free method of the appearance of an atomic double word compare and swap (DCAS) operation on a pointer and ABA avoidance sequence number pair of words while using atomic single word compare and swap (CAS) instructions. To perform this function an area of memory is used by this invention and described as a protected pointer. The protected pointer consists of three words, comprising of: a) a pointer to a memory location, such as a node in linked list, together with b) an ABA avoidance sequence number, and combined together with a third word containing c) a specially crafted hash code derived from the pointer and the ABA avoidance sequence number. The three words together are referred to as a three word protected pointer and are used by this invention for implementing a Lock-Free and Wait-Free method of simulating DCAS using three CAS instructions. The specially crafted hash code, when used in a manner as described in this invention, enable competing threads in a multithreaded environment to advance a partially completed method of the appearance of an atomic double word compare and swap (DCAS) operation on a pointer and ABA avoidance sequence number pair of words while using atomic single word compare and swap (CAS) instructions as partially executed by a different thread. The ability for any thread to complete a partially completed appearance of DCAS provides for wait free operation.
Owner:DEMPSEY JAMES G

Efficient synchronization of a sliding buffer window to prevent packet re-injection in an internet protocol (IP) network

An apparatus, system, and method are disclosed for efficient synchronization of a sliding buffer window to prevent packet re-injection in an IP network. The steps of the method include receiving a data packet which comprises a packet sequence number. The method initializes a replay counter, an update counter, and a circular buffer window. The circular buffer window may comprise at least one window bank and the circular buffer window may also comprise a current window bank. Furthermore, the method may include determining that the packet sequence number is greater than a maximum current bank value. In response, the method may define shifting the circular buffer window such that a current window bank position is incremented. The method may then include determining that the packet sequence number is inside the current window bank and accepting the data packet. Furthermore, a Double Compare and Swap (DCS) operation may update the bit indicator and increment the update counter and replay counter. Also, a Compare and Swap and Store (CSST) operation may increment the update counter and replay counter and set a shifted window bank. Therefore, DCS and CSST operation may still be used without having to resort to traditional locks with higher overhead. In addition, the buffer window may be an arbitrary size and is not limited to the machine architecture limit for compare and swap operations.
Owner:IBM CORP
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