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Global layout method and device based on wire network distribution and capable of achieving wiring driving

A global layout and linear drive technology, applied in special data processing applications, instruments, electrical digital data processing, etc., can solve problems such as wiring congestion, inability to separate long-line nets, and wiring overflow

Active Publication Date: 2021-04-27
西安国微半导体有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004]However, the above-mentioned cell expansion method can only solve the wiring congestion caused by the dense local standard cells. For standard cells related to congestion, if they are not located in the congested G- In the cell, it will be ignored; and, in the case of a large number of long-line nets gathered and the standard cells on the long-line net are far away from each other, the above-mentioned cell expansion method cannot separate these long-line nets
Therefore, the layout results obtained in the prior art using the above methods are still not friendly enough for subsequent wiring, resulting in a high possibility of wiring overflow

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  • Global layout method and device based on wire network distribution and capable of achieving wiring driving
  • Global layout method and device based on wire network distribution and capable of achieving wiring driving
  • Global layout method and device based on wire network distribution and capable of achieving wiring driving

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Embodiment Construction

[0075] The present invention will be described in further detail below in conjunction with specific examples, but the embodiments of the present invention are not limited thereto.

[0076] In order to obtain a layout result that is more friendly to wiring, thereby reducing the probability of wiring overflow, an embodiment of the present invention provides a global layout method and device based on net distribution and routability drive; wherein, the execution subject of the method is For the device; the device can be applied in electronic equipment. In a specific application, the electronic device may be a computer, a portable computer, and the like. There is no limitation here, and any electronic device that can realize the present invention belongs to the protection scope of the present invention.

[0077] First, a routability-driven global layout method based on net distribution provided by an embodiment of the present invention is described in detail. Such as figure 2 ...

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Abstract

The invention discloses a global layout method and device based on wire network distribution and capable of achieving wiring driving. The method comprises the steps of performing global layout and legalization processing to obtain a layout result; performing global wiring to obtain a G-Cell congestion graph; counting the total number of wiring overflow in the G-Cell congestion graph; if the threshold value is exceeded, performing unit expansion and detection window application in sequence, and then performing global layout again; if not, outputting a layout result; the cell expansion includes determining all standard cells associated with the congested G-Cell and causing them to each undergo horizontal expansion and / or vertical expansion; the probe window application sub-step includes generating a virtual probe window for each standard cell associated with the congested G-Cell, the window being used for probing relevant cells in a global layout and applying additional density gradients to the standard cells based on the relevant cells. According to the invention, a layout result which is more friendly to wiring can be obtained, and the probability of wiring overflow is reduced.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a global layout method and device based on a wire network distribution-based routability drive. Background technique [0002] The layout of devices and the wiring between devices are two very important processes in integrated circuit design. In the early stage of the development of layout algorithms, due to the small scale of integrated circuits, the process does not have high requirements for layout results, and the line length is the algorithm. The only factor considered. With the scale of VLSI and the development of process, the difficulty of wiring in the physical design process is also increasing. It is difficult to get ideal results only by considering the routability in the wiring stage. The layout that only considers the line length may cause irreparable DRC (Design Rule Check) violations in the subsequent routing stage. In order to obtain a more ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/392G06F30/3947
CPCG06F30/392G06F30/3947
Inventor 刘鼎成
Owner 西安国微半导体有限公司