Surge protector with multi-channel protection
A surge protector, multi-channel technology, applied in emergency protection circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, electrical components, etc., can solve the problem of large surge impact energy, increased manufacturing costs, Installation volume increase and other problems, to achieve the effect of reducing production costs
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Embodiment 1
[0047] This embodiment discloses a surge protector with multi-channel protection, which aims to improve the problem of high cost of SPD equipment formed by serial-parallel connection of multiple devices in the prior art. By optimizing the circuit connection mode, it can be used in When selecting materials, select materials with lower specifications and ensure that they have relatively stable breaking capacity.
[0048] Specifically, the surge protector is connected to an external circuit, has two terminals, and a parallel main channel and a secondary channel are provided between the two terminals. The main channel serves as the main channel for absorbing surge pulses. A first piezoresistor 1 with better surge resistance performance is provided, so that a large part of the surge energy can be discharged through this circuit. The secondary channel is a series branch composed of the second piezoresistor 2 and the third piezoresistor 3, which serves as a secondary channel for abso...
Embodiment 2
[0057] This embodiment also discloses a surge protector for multi-channel protection, such as figure 1 As shown, there are also two terminals connected to the external circuit, and a main channel and a secondary channel are arranged in parallel between the two terminals. The surge through the two terminals flows through the main channel and the secondary channel at the same time, and the main channel The channel is provided with a first varistor 1, and the auxiliary channel is provided with a second varistor 2 and a third varistor 3 connected in series, and the third varistor 3 has high surge impact resistance The surge impact resistance performance of the second varistor 2 is used.
[0058] A thermal protection structure connected in parallel with the third piezoresistor 3 is also provided on the auxiliary channel, and a thermal tripping structure is provided at any end. The positive temperature coefficient thermistor 5 and the thermal The trip structure is thermally coupled...
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