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Regulation/bypass automation for LDO with multiple supply voltages

A technology of power supply voltage and bypass signal, applied in amplifiers with semiconductor devices/discharge tubes, adjusting electrical variables, control/regulation systems, etc.

Active Publication Date: 2021-04-27
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, there are still legacy devices that need to support operation at higher supply voltages (eg, 5V, 3.3V, etc.)

Method used

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  • Regulation/bypass automation for LDO with multiple supply voltages
  • Regulation/bypass automation for LDO with multiple supply voltages
  • Regulation/bypass automation for LDO with multiple supply voltages

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Embodiment Construction

[0019] The detailed description, set forth below in conjunction with the accompanying figures, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details in order to provide a thorough understanding of various concepts. It will be apparent, however, to one skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form in order to avoid obscuring the concepts.

[0020] System-on-chip (SoC) designs in advanced technology nodes need to interface with multiple input / output (I / O) supply voltages, including higher voltages in legacy equipment. An essential function of a power management unit (PMU) is to provide a uniform power-up sequence for various I / O power supplies to reduce product development time. Require...

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PUM

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Abstract

Regulation / Bypass automation for a low drop-out regulator (LDO) with multiple supply voltages is disclosed. In some implementations, a LDO includes a resistor, a pass transistor having a source, a gate, and a drain to output a voltage Vout, the source coupled to a supply voltage, the gate coupled to an output of an operational transconductance amplifier (OTA), and the drain coupled to a first terminal of the resistor; a feedback switch having a drain, a gate, and a source, the drain coupled to a second terminal of the resistor, the source coupled to a negative input of the OTA; and an pull-down transistor having a drain, a gate, and a source, the source coupled to ground, and the drain coupled to the negative input of the OTA, wherein the gate of the pull-down transistor and the gate of the feedback switch are configured to receive a bypass signal.

Description

[0001] priority statement [0002] This patent application claims priority to Application No. 16 / 136,305, filed September 20, 2018, entitled "REGULATION / BYPASS AUTOMATION FOR LDO WITH MULTIPLE SUPPLY VOLTAGES," which is assigned to the assignee of this patent application and is registered at This is expressly incorporated herein by reference. technical field [0003] Aspects of the present disclosure relate generally to power regulation in semiconductor circuits, and more particularly to regulation / bypass automation for low dropout regulators (LDOs) with multiple supply voltages. Background technique [0004] With advances in semiconductor technology, many systems on a chip (SoC) can operate with lower supply voltages (eg, 1.8V), thereby reducing overall power consumption. However, there are still legacy devices that need to be supported to operate at higher supply voltages (eg, 5V, 3.3V, etc.). Therefore, there is a need in the art to provide more flexible and efficient ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/575H03F3/45
CPCG05F1/575H03F3/45183H03F2203/45674H03F3/45179
Inventor 程岳春程宏敏林建志
Owner QUALCOMM INC