Memory Array And Method for Forming A Memory Array Comprising Strings Of Memory Cells

Abstract

The invention relates to a memory array and a method for forming a memory array comprising strings of memory cells. The memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. The strings of memory cells in the stack comprise channel-material strings and storage-material strings extending through the insulative tiers and the conductive tiers. At least some of the storage material of the storage-material strings in individual of the insulative tiers are intrinsically less charge-transmissive than is the storage material in the storage-material strings in individual of the conductive tiers. Other aspects, including method, are disclosed.

Description

technical field [0001] Embodiments disclosed herein relate to memory arrays and methods for forming memory arrays including strings of memory cells. Background technique [0002] Memory is a type of integrated circuit and is used in computer systems to store data. Memory can be fabricated in one or more arrays of individual memory cells. Memory cells can be written to or read from memory cells using digit lines (which can also be referred to as bit lines, data lines, or sense lines) and access lines (which can also be referred to as word lines). Sense lines can conductively interconnect the memory cells along the columns of the array, and access lines can conductively interconnect the memory cells along the rows of the array. Each memory cell is uniquely addressable through a combination of sense and access lines. [0003] Memory cells can be volatile, semi-volatile, or non-volatile. Nonvolatile memory cells can store data for extended periods of time without power being...

AI Technical Summary

Problems solved by technology

When a string of storage material is present and programmed by charge (e.g., electrons) in one or more of the gate material layers, the charge can migrate vertically up and down thereby detrimentally depleting charge from the gate material layers

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