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Mirror protection method and data structure based on FLASH chip with page atomicity

A data structure and atomic technology, applied in the field of smart cards, which can solve the problems of power-off data, poor performance, and unpredictability.

Active Publication Date: 2021-06-11
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Generally, in the traditional method, each time the FLASH is erased and written, in order to solve the problem that the data cannot be predicted when the power is turned off during the erasing and writing of the non-page atomic FLASH chip, it is necessary to divide the backup area identifier and backup area data into two FLASH pages for storage, first erase Data in the backup area, then erase and write the backup area to effectively mark it as valid, and then write the target data
Erasing and writing the same page of FLASH repeatedly in the transaction, the performance is poor

Method used

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  • Mirror protection method and data structure based on FLASH chip with page atomicity
  • Mirror protection method and data structure based on FLASH chip with page atomicity
  • Mirror protection method and data structure based on FLASH chip with page atomicity

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Embodiment Construction

[0020] A mirror image protection method based on a FLASH chip with page atomicity provided by the present invention will be further described below with reference to the accompanying drawings and examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0021] 1. A page cache data structure diagram based on an image protection method based on a FLASH chip with page atomicity, as attached figure 1 As shown, the FLASH page size is 512Bytes, and the page cache is RAM with the capacity of 4 FLASH pages, that is, 4 caches. The mapping rule between each cache and the target address of the data to be written adopts page alignment.

[0022] 2. A mirror protection method based on a FLASH chip with page atomicity transaction block data structure diagram and transaction log data structure diagram, as attached figure 2 As sh...

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Abstract

The invention discloses a mirroring protection method and a data structure based on a FLASH chip with page atomicity, which ensure that data subjected to mirroring protection can have atomicity and improve the performance of mirroring protection when the FLASH is erased and written in case of power failure through the page atomicity of the chip and the mirroring protection method of software based on cache. The method provided by the invention comprises the following steps of: based on FLASH erasing and writing of cache, caching data of a target address page and transaction log data by utilizing the cache, and when the cache is insufficient or a transaction is submitted, backing up original data of a target address, and writing updated data into the target address.

Description

technical field [0001] The invention relates to the technical field of smart cards, and relates to an image protection method based on a FLASH chip with page atomicity. Background technique [0002] According to the flash erasing and writing characteristics of the smart card chip, after the chip is powered off during the erasing and writing of the flash page, the atomicity of single or multiple flash page data cannot be guaranteed, which will cause abnormal smart card data and pose a great security risk. [0003] At present, in order to deal with the power-down problem of FLASH erasing and writing in smart cards, the traditional image protection method is usually the main method. Generally, in the traditional method, each time the FLASH is erased and written, in order to solve the problem that the data cannot be predicted when the power is cut off during the erasing and writing of the non-page atomic FLASH chip, it is necessary to divide the backup area identifier and backup...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/14G06F11/20G06F12/1009
CPCG06F12/1009G06F11/1448G06F11/2056
Inventor 高景阳
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD