Semiconductor package

Abstract

A semiconductor package includes a package substrate, a lower semiconductor device arranged on the package substrate and including first through electrodes, first lower connection bumps arranged between the package substrate and the lower semiconductor device and electrically connecting the package substrate to the first through electrodes, a connecting substrate arranged on the package substrate and including second through electrodes, second lower connection bumps arranged between the package substrate and the connecting substrate and electrically connecting the package substrate to the second through electrodes, and an upper semiconductor device arranged on the lower semiconductor device and electrically connected to the first through electrodes and the second through electrodes.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2019-0174286 filed on December 24, 2019 at the Korean Intellectual Property Office, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0003] Apparatus, devices, methods, and articles of manufacture consistent with the present disclosure relate to semiconductor packages, and more particularly, to semiconductor packages having improved heat dissipation characteristics. Background technique [0004] Generally, a semiconductor package is formed by performing a packaging process on a semiconductor chip formed by performing various semiconductor processes on a wafer. Recently, various semiconductor chips have been packaged in one semiconductor package, and the semiconductor chips are electrically connected to each other so that the electrically connected semiconductor chips operate as a system. When the semico...

AI Technical Summary

Problems solved by technology

When a semiconductor chip is in operation, excessive heat may be generated, and therefore, the performance of the semiconductor package may be degraded

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