System and method for transparent transmission of as6802 synchronization frame in tte switch

An AS6802, transparent transmission technology, which is applied in the field of AS6802 synchronous frame transparent transmission system, can solve the problems of increased delay, inability to synchronize, and increased delay of synchronous frame transmission, so as to reduce transmission delay, avoid data loss, and reduce retention time Reduced effect

Active Publication Date: 2022-07-26
XIDIAN UNIV
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  • Abstract
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  • Claims
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Problems solved by technology

The disadvantage of this method is that since this method does not involve the transparent transmission of synchronization frames, it can only be used for clock synchronization of a network with a single switching device, and is not suitable for clock synchronization of a network of multiple switching devices. Form a large-scale time-triggered Ethernet system
The disadvantage of this method is that, first, when the switch forwards, the synchronization frame is treated as an ordinary Ethernet frame, and the priority of the synchronization frame is lower than that of the TT service frame, which causes the transmission delay of the synchronization frame to increase and crowds the TT of the switch. The transmission bandwidth of the business, especially the transmission bandwidth occupied by multi-level cascading, will be unbearable; second, the synchronization frame switching plane is specially set up to separate the time synchronization unit from the transparent transmission of the synchronization frame, which wastes logical resources and must be static Configuring the switching path greatly reduces the flexibility and greatly increases the delay; third, the forwarding delay of the synchronization frame does not take into account the PHY delay of the board, and the synchronization accuracy cannot be guaranteed, especially when multi-level cascading may cause synchronization failure; Fourth, the priority of the synchronization frame is not set to the highest priority, which will cause the device to fail to synchronize in high-density business transmission
[0006] (1) The existing AS6802 standard-based switching device clock synchronization method does not involve the transparent transmission of synchronization frames, so it can only be used for clock synchronization of a network with a single switching device, and is not suitable for clock synchronization of a network of multiple switching devices , cannot constitute a large-scale time-triggered Ethernet system
[0007] (2) In the prior art, when the switch forwards, the synchronization frame is treated as an ordinary Ethernet frame, and the priority of the synchronization frame is lower than that of the TT service frame, resulting in an increase in the transmission delay of the synchronization frame, and crowding out the transmission of the TT service of the switch Bandwidth, especially the transmission bandwidth occupied by multi-level cascading will be unbearable
[0008] (3) Existing Ethernet switches specially set up a synchronization frame switching plane to separate the time synchronization unit from the transparent transmission of the synchronization frame, which wastes logical resources and must also statically configure the switching path, greatly reducing flexibility and greatly increasing delay
[0009] (4) In the prior art, the forwarding delay of the synchronization frame does not consider the PHY delay of the board, and the synchronization accuracy cannot be guaranteed, especially when multi-level cascading may cause synchronization failure; meanwhile, the priority of the synchronization frame is not set to The highest priority, which will cause the device to fail to synchronize during high-density business transmission
In the existing technology, when the switch forwards, the synchronization frame is treated as an ordinary Ethernet frame, which not only does not comply with the AS6802 standard, but also greatly increases the transmission delay of the synchronization frame, which affects the synchronization accuracy and even causes the problem of synchronization failure
The difficulty to solve is not only to ensure the function and performance requirements of synchronization, but also to ensure the available bandwidth of TT services as much as possible, because the purpose of synchronization is for the transmission of TT services. If the synchronization process occupies too much bandwidth, it will make the entire network Reduced efficiency

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  • System and method for transparent transmission of as6802 synchronization frame in tte switch
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  • System and method for transparent transmission of as6802 synchronization frame in tte switch

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Embodiment 1

[0131] The purpose of the present invention is to provide a device and method for transparent transmission of AS6802 synchronization frames in a TTE switch, aiming at the deficiencies of the prior art.

[0132] In order to achieve the above purpose, the idea of ​​the present invention is: the programmable logic chip FPGA implements a multi-port time-triggered Ethernet switch, and the device is mainly used for transparent transmission of AS6802 synchronization frames in the TTE network. Listen to the synchronization frames passing through each port of the switch to obtain the receiving time point, and perform frame analysis on the received synchronization frames to obtain all frame information of the synchronization frames, including: destination address, source address, integration period, member vector, Sync priority, sync domain, frame type, and transparent clock value, store all frame information in registers. Then identify the identification bit of the cascade port, synthe...

Embodiment 2

[0164] The transparent transmission method of the AS6802 synchronization frame in the TTE switch provided by the embodiment of the present invention includes the following steps:

[0165] (1) Configure the status of the cascade port flag bit of the TTE switch port:

[0166] Suppose the TTE switch includes P ports, one of which is a cascading port, and the remaining P-1 ports are non-cascading ports. The flags of the cascading ports are valid, and the flags of the non-cascading ports are invalid. P≥2;

[0167] (2) Receive the first-in-first-out queue FIFO module to obtain the correct AS6802 synchronization frame and buffer it:

[0168] (2a) The synchronization frame receiving module receives N consecutive AS6802 synchronization frames A output by the input distribution module of the TTE switch, A={A i }, where A i Indicates the i-th AS6802 synchronization frame, i∈[1,N], N≥2;

[0169] (2b) Cyclic redundancy check module for each A received by the synchronization frame recei...

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Abstract

The invention belongs to the field of communication technology, and discloses a system and method for transparent transmission of AS6802 synchronous frames in a TTE switch. A parsing module, a frame information buffer management module, a synchronous frame transparent transmission management module, and a sending first-in, first-out queue FIFO module; the AS6802 synchronous frame transparent transmission method in the TTE switch includes: synchronous frame buffering, listening to receiving time and frame parsing, frame Information and receiving time point buffer management, synchronous frame transparent transmission management module is idle, synchronous frame synthesis, synchronous frame transmission, synchronous frame arbitration. The invention solves the problem of transparent transmission of synchronization frames, increases the number of nodes supported by the TTE system, reduces the retention time and the maximum transmission delay of the system synchronization frames, and improves the adaptability and clock synchronization precision of the TTE switch.

Description

technical field [0001] The invention belongs to the technical field of communication, and in particular relates to an AS6802 synchronization frame transparent transmission system and method in a TTE switch. Background technique [0002] At present, with the rapid development of science and technology, the modern industrial control system is becoming larger and larger, and the high-precision and high-reliability synchronous Ethernet switching network composed of a single switching device is increasingly unable to meet the needs. The high-precision, high-reliability synchronous Ethernet switching network that is connected to the Internet has attracted more and more attention. The SAE AS6802 standard defines a time-triggered service for Ethernet networks, providing high-precision, high-reliability, and fault-tolerant precise clock synchronization for time-triggered Ethernet. Implementing the synchronization client function components defined by AS6802 synchronization in TTE sw...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L49/111H04L49/90H04L7/00
CPCH04L49/30H04L49/90H04L7/0033
Inventor 邱智亮曹家亮潘伟涛楼耀琛张洪斌狄昕涛董勐
Owner XIDIAN UNIV
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