120 results about "Synchronous Ethernet" patented technology

A transport facility adapted to transport TDM bit streams using IP packets over an asynchronous Ethernet network. TDM bit streams such as E1, T1, E3, T3, OC-3, OC-12, STM-1, STM-4, etc. are received, buffered and encapsulated into Ethernet frames. The Circuit Emulation Device (CED) receives, buffers and assembles in real-time ingress data from TDM ports into Ethernet Frames and forwards them to an Ethernet interface. The TDM data is encapsulated within RTP, UDP and IP packets before being encapsulated within an Ethernet frame. In the egress direction, Ethernet frames enter the encapsulation/segmentation processor from the Ethernet port and the IP, UDP and RTP packets are extracted from the frame. TDM data is extracted and the bit streams are re-generated and forwarded to the TDM ports for transmission over legacy TDM facilities.

The present disclosure relates to Ethernet synchronization systems and methods that combines Synchronous Ethernet (Sync-E) and Precision Time Protocol (PTP) IEEE 1588 algorithms. The present invention includes systems and methods for Ethernet networks and node configurations that include a set of rules on node placement, such as Boundary Clock (BC) nodes and Sync-E nodes, a clock selection algorithm, a holdover algorithm, and the like. Advantageously, the present invention provides an architecture that allows practical and real-world useful clock propagation through placement of BCs and Sync-E nodes for best performance. Practical experience and theoretical design are embodied in the present invention to define a very specific set of rules on how to build a network capable of providing accurate and reliable synchronization. The present invention includes clock selection that unifies Sync-E and 1588 algorithms.

In certain embodiments, a slave node in a packet network achieves time synchronization with a master node by implementing a packet-layer synchronization procedure, such as the IEEE1588 precision timing protocol (PTP), to set the slave's local time based on the master's time. The slave's local time is then maintained by implementing a physical-layer syntonization procedure, such as synchronous Ethernet, without relying on the packet-layer synchronization procedure. The packet-layer synchronization procedure may be selectively employed to adjust the slave's local time (if needed) after significant periods of time (e.g., substantially greater than one second). Both the packet-layer synchronization procedure and the physical-layer syntonization procedure are traceable to a common reference timescale (e.g., UTC). Depending on the implementation, the packet-layer synchronization procedure can be, but does not have to be, terminated when not being employed to adjust the slave's local time.

A method, system and master service interface transfer differential timing over a packet network. The transmitting service interface receives a service clock and is coupled to a receiving service interface through a network backplane. A primary reference clock is provided to time the network backplane. The primary reference clock and the service clock are used to synthesize a copy of the service clock connected to the transmitting service interface. A first control word containing an error differential between the service clock and the synthesized copy of the service clock is generated and transmitted through the network backplane via a packet. The first control word, together with the primary reference clock, is used to recreate the service clock for timing the receiving service interface.

A novel clock method and synchronization mechanism for recovering and distributing a centralized clock source synchronously over legacy asynchronous network devices such as legacy optical Ethernet devices that do not support synchronous Ethernet. An external device functions transparently to provide legacy optical Ethernet devices a clock synchronization and distribution mechanism. The external devices implement a clock conversion scheme whereby multiple clocks having diverse rates are converted to clock signals all having a common rate. One of the converted clocks is selected and all downstream clock signals are then derived from this clock. A high quality clock source located anywhere on the network is distributed throughout the network thus turning an asynchronous Ethernet network into a synchronous Ethernet network. Synchronous TDM data streams can then be easily transported over the Ethernet network.

This invention relates to methods and devices for time and frequency synchronization. The invention has particular application where time and frequency synchronization over packet networks using, for example, the IEEE 1588 Precision Time Protocol (PTP) is being carried out. The primary challenge in clock distribution over packet networks is the variable transit delays experienced by timing packets, packet delay variations (PDVs). Embodiments of the invention provide a method for time offset alignment with PDV compensation where a synchronized frequency signal is available at a slave device via Synchronous Ethernet and is used to determine the compensation parameters for the PDV.

A method of configuring system layers for a synchronous Ethernet is provided. In the method, a physical layer takes charge of input and output of an Ethernet frame in direct relation to hardware, an xMII (x Media Independent Interface) layer connects the physical layer to a data link layer. The data link layer has a sync frame processor for processing a synchronous frame and an async frame processor for processing an asynchronous frame. A parser and multiplexer (MUX), included in the x MII layer, construct a super frame with a synchronous frame and an asynchronous frame, transmit the super frame through the physical layer, parse a received super frame into a synchronous frame and an asynchronous frame, and transmit the synchronous and asynchronous frames to the data link layer.

A method of enabling transmission of a time-critical control signal event in a sync frame period, such as a pause signal that is generated when the receive buffer of an Ethernet switch is filled with packets beyond a threshold due to congestion of uplink asynchronous data, is disclosed. To transmit time-critical information in a synchronous Ethernet system, a current transmission period is checked upon detection of a time-critical event. If the current transmission period is a sync frame period, time-critical control information is generated, inserted into the first sub-sync frame after the time-critical event, and transmitted. If the current transmission period is an async frame period, a control frame including the time-critical control information is generated and transmitted.

An embodiment of the invention provides a clock synchronization method, which includes of acquiring the transmission time T1 of synchronous messages after receiving the synchronous messages; recording the clock count T2 of a local crystal oscillator when the synchronous messages arrive; sending delay correction application messages, recording the clock count T3 of the local crystal oscillator when in sending of the delay correction application messages and starting counting of a synchronous Ethernet clock; receiving the time T4 for main clock equipment to receive the delay correction application messages after receiving delay correction application response messages; computing transmission delay according to the T1, the T2, the T3 and the T4, and computing the main clock equivalence of the T3 according to the T1, the T2, the T3 and the transmission delay; summing the main clock equivalence of the T3 and the current counting value of the synchronous Ethernet clock, and finally regulating clock output according to the summing results. The invention further provides a clock synchronization system. By the clock synchronization method and the clock synchronization system in the technical scheme, complexity of clock synchronization is reduced, convergence rate is increased and cost is saved.

The invention discloses a method for realizing a precision time protocol (PTP) with nanosecond-level precision. The method comprises the following steps of: identifying a PTP message and recording a leaving or arrival timestamp of the PTP message in a physical layer (PHY) chip; realizing frequency synchronization by using a synchronization Ethernet (SyncE) technology in a physical layer; and managing the timestamp in a way of combining the PHY chip and a field programmable gate array (FPGA), and ensuring the consistency of time in the PHY chip and FPGA maintenance time at the arrival of the PTP message by adopting a software processing method. By the technical scheme provided by the invention, the requirements of a communication system on time synchronization precision can be met, and the synchronization precision of the PTP reaches a nanosecond level.

A communication/broadcast multiplexer and demultiplexer for multiplexing and demultiplexing communication and broadcast signals using a specific transmission standard in an optical network system that integrates broadcast and communication services using a channel selection technique. The multiplexer comprises a broadcast data input unit, a communication data input unit, and a synchronous Ethernet framer. The broadcast data input unit receives broadcast data switched on a subscriber basis through a broadcast switch in an optical line terminal (OLT) in the system, and transfers it as a synchronous data frame to the synchronous Ethernet framer. The communication data input unit receives communication data on a subscriber basis through an Ethernet switch in the OLT and transfers it as an asynchronous data frame to the synchronous Ethernet framer. The synchronous Ethernet framer converts both the received synchronous and asynchronous data frames into a TDM synchronous Ethernet frame, and outputs the TDM synchronous Ethernet frame.

The invention discloses a clock synchronization method for synchronous Ethernets, as well as a synchronous information sending/receiving method, device and apparatus. The clock synchronization processing performed by a network element on a looped network comprises the following steps: determining the current available clock sources, wherein line clock sources with clock identifications identical to the MAC (media access control) address of the network element can not be used; selecting a currently-used clock source from the determined current available clock sources according to the quality grade and priority of the clock sources; and transmitting a clock within the looped network, and transmitting the clock identification and clock quality information of the clock by an ESMC message, if a line clock source transmitted from the inside of the looped network is used currently, taking the clock identification of the line clock source as the transmitted clock identification, and if a clock source accessed from the outside of the looped network is used currently, taking the MAC address of the network element as the transmitted clock identification. A clock synchronization control device in the network element comprises a clock source selection device and an information transmission device. In the invention, through taking the MAC address of the network element as the clock identification, the problem that clocks on the looped network are looped is solved, and an operation of manually configuring clock identifications is not required.

A Synchronous Ethernet (SyncE) network device includes a pair of phase-locked loops including a first phase-locked loop responsive to a SyncE input clock and a second phase-locked loop coupled to the first phase-locked loop. The second phase-locked loop is configured to be simultaneously lockable to both the SyncE input clock via the first phase-locked loop and an IEEE 1588 packet stream, during a locked mode of operation, and also lockable to the SyncE input clock during a holdover mode of operation which is triggered in response to a failure of the IEEE 1588 packet stream.

It is provided a method for transmitting a wireless signal on Ethernet wiring The wireless signal is received in a hub unit for delivery to a remote unit In the hub unit the wireless signal is down converted to a down-converted frequency band for propagation on the Ethernet wiring A reference signal associated with a local oscillator used for the down conversion is embedded on a synchronous Ethernet stream that may include Ethernet data received at hub unit The synchronous Ethernet stream and the down converted wireless signal are submitted through the Ethernet wiring to the remote unit. The synchronous Ethernet stream may include data for management of electronic circuits installed in the remote unit, as well as a synchronization signal used thereof A converted replica of the first signal may be included in digital form in frames of the synchronous Ethernet stream

The invention relates to the technical field of network communication, and provides an OTN (Optical Transport Network) device and a method for realizing the time synchronous transmission. According to the device and the method, provided by the invention, and on the basis of the synchronous message and the fundamental principle of IEEE (Institute of Electrical and Electronic Engineering) 1588v2 definition, the synchronous message package, the interactive process, the message processing mode, the clock regulation algorithm and the like which are suitable to be used in an OTN are provided, a corresponding device functional structure is also provided, the high-accuracy time synchronous transmission of the OTN which adopts a synchronous clock technology can be realized after compensation, and the high-accuracy synchronous transmission can be realized without on the basis that functions such as complicated synchronous Ethernet are added.

The invention relates to a method, terminal and system for measuring the asymmetric time delay of a transmission line. The method comprises the following steps: a slave terminal receives a first message carrying a first timestamp sent by a master terminal, and records a second timestamp receiving the first message; the slave terminal and the master terminal perform switch changeover through message interaction; after that, the slave terminal receives a second message carrying a third timestamp sent by the master terminal, and records a fourth timestamp receiving the second message; and the slave terminal calculates the asymmetric time delay of the transmission line according to the first, second, third and fourth timestamps. According to the invention, the clocks of the master and slave terminals are synchronized by synchronizing Ethernet, the timestamps of receiving and sending messages of the master and slave terminals are recorded, and the optical fiber on the link is changed over in a changeover switch mode; after the changeover, the message is sent again and the timestamps of the message at the master and slave terminals are recorded, and the slave terminal can quickly calculate the asymmetric time delay of the transmission link according to the obtained four timestamps, wherein the precision can reach the nanosecond level; and the measurement process is simplified.

Disclosed is a method for establishing a synchronization in a synchronous Ethernet system. Devices are classified according to the type of the devices, and a device having a highest class in the synchronous Ethernet system is detected, then it is determined if the device having the highest class is able to serve as the timing master. If so, the device having the highest class is able to serve as the timing master if only one such device is detected; otherwise, the timing master between devices having the highest class is selected through a collision algorithm.

The invention discloses a rack-mount synchronous Ethernet architecture and a clock synchronization control method. A back board topology structure is designed according to an M-LVDS (multiple low voltage differential signaling) scheme; each service board card selects a synchronous clock through a multiplexer, and a phase locked loop is used to process the synchronous clock, so that all service ports in the rack can serve as master ports of the synchronous Ethernet and also can serve as slave ports of the synchronous Ethernet. By using the rack-mount synchronous Ethernet architecture and the clock synchronization control method, a special block board card is eliminated for processing, and the equipment cost is reduced; and the flexibility of the clock source selection is improved, and reliable clock restoration, clock synchronization, clock degittering and the transmission of a synchronous time stamp are facilitated.

The invention discloses a method and a device for realizing time synchronization on an Ethernet switch. The device comprises a Switch module, a plurality of PHY (Physical layer) modules, a CPU module and a clock processing module, wherein the clock processing module comprises a clock synchronization sub-module and a clock production sub-module. The clock can be synchronized according to the clock provided by the PHY module through adopting the time delay measuring technology provided by the synchronic Ethernet (SyncE, SynchronousEthernet) protocol and the IEEE1588 protocol, then the reference input clock needed by the relative modules in the system can be produced, and the frequencies of the main device and the auxiliary device are synchronized. Because of adopting the PHY chip with SyncE function, the frequency synchronization precision is very high, which can reach nanosecond level.

Disclosed is a method for transmitting asynchronous data in a synchronous Ethernet having a sync frame section and an async frame section. The method includes the steps of: a) allocating a priority to motion picture data for transmission through the sync frame section; b) determining if a size of the data of all frames for transmission in one cycle exceeds the predetermined length; c) dropping motion picture data having a lower priority (e.g. which corresponds to the size of the data exceeding the predetermined length); and d) transmitting the data in one cycle unit when the size of the data to be transmitted does not exceed the predetermined length.

Disclosed is a method for constructing a frame of data for transmission by each Ethernet device in a synchronous Ethernet, which comprising the steps of receiving the data for transmission and confirming whether or not the data for transmission are synchronous data, when the received data are synchronous data, marking that the data are synchronous data in a preamble of the frame and constructing a synchronous frame by including the received data into a data portion of the frame which does not contain a MAC header and when the received data are asynchronous data, marking that the data are asynchronous data in the preamble of the frame and constructing an asynchronous frame by including the received data into a data portion of the frame containing a MAC header.

A highly scalable platform for radiation measurement data collection with high precision time stamping and time measurements between the elements in the detection array uses IEEE 1588 with or without Synchronous Ethernet (timing over Ethernet) to synchronize the measurements. At a minimum, the system includes at least two radiation detector units, an IEEE 1588 and SyncE enabled Ethernet switch, and a computer for processing. The addition of timing over Ethernet and power over Ethernet (PoE) allows a radiation measurement system to operate with a single Ethernet cable, simplifying deployment of detectors using standardized technology with a multitude of configuration possibilities. This eliminates the need for an additional hardware for the timing measurements which simplifies the detection system, reduces the cost of the deployment, reduces the power consumption of the detection system and reduces the overall size of the system.

A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.