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Chip number detection method based on iterative translation verification

A detection method and chip technology, applied in image data processing, image analysis, image enhancement, etc., can solve the problem of inability to detect the number of various chips separately, and achieve the effect of solving distortion and improving accuracy.

Active Publication Date: 2021-08-17
北京理工大学重庆创新中心 +1
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Problems solved by technology

[0003] The current machine vision is applied to chip quantity detection, simply detects the quantity of all chips through contour detection. In the case of chips, the current detection technology cannot detect the number of each chip separately

Method used

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  • Chip number detection method based on iterative translation verification
  • Chip number detection method based on iterative translation verification
  • Chip number detection method based on iterative translation verification

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Embodiment Construction

[0019] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below through specific implementation methods in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0020] The present application provides a method for detecting the number of chips based on iterative translation verification, which can count the number of chips of various types on the wafer.

[0021] In one embodiment, such as figure 1 As shown, a chip quantity detection method based on iterative translation verification is provided, including the following steps:

[0022] S110 collects a wafer image, cuts out a chip template from the wafer image, and obtains a chip template image.

[0023] Specifically, such as Figure 3-Figure 4 As shown in FIG. 1 , a wafer image i...

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Abstract

The invention provides a chip number detection method based on iterative translation verification; the method comprises the steps: obtaining a chip template image from a wafer image, determining the position of a chip template on a wafer, and further determining the position of a chip on the chip template through employing a contour searching algorithm; determining the position of the chip on the wafer based on the position of the chip template on the wafer; numbering each chip on the chip template by using an algorithm so as to obtain verified chips with determined positions and numbers on the template; carrying out the iterative translation by using the verified chips, so that the to-be-verified chips of which the positions are determined but the numbers are not determined are verified, and finally acquiring the number of the chips of each type of numbers. According to the invention, the number of different types of chips on the wafer is counted, the problem of large verification error caused by selecting a group of verified chips to continuously translate due to distortion of the wafer image is solved, and the accuracy of number detection is improved.

Description

technical field [0001] The invention relates to the technical field of machine vision, in particular to a chip quantity detection method based on iterative translation verification. Background technique [0002] For a wafer, the chips on it are composed of a chip template periodically arranged, and the chip template is a collection of one or more chips composed of one or more chips. [0003] The current machine vision is applied to chip quantity detection, simply detects the quantity of all chips through contour detection. In the case of chips, the current detection technology cannot detect the number of various chips separately. Contents of the invention [0004] Based on this, it is necessary to provide a method for detecting the number of chips based on iterative translation verification for the above technical problems. [0005] A method for detecting the number of chips based on iterative translation verification, the method comprising: collecting a wafer image, cut...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T7/00G06T7/10G06T7/33
CPCG06T7/0004G06T7/10G06T7/344G06T2207/30242G06T2207/30148G06T2207/20132
Inventor 王旭于兴华王小鹏王家琦孙震
Owner 北京理工大学重庆创新中心
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