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Driving output circuit, chip and driving output method

A technology for driving outputs and circuits, which is applied in the connection/interface arrangement of logic circuits, coupling/interfaces of logic circuits using field effect transistors, etc., and can solve problems such as the inability to provide driving output methods.

Active Publication Date: 2021-09-03
MONTAGE TECH KUNSHAN CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a drive output circuit, chip and drive output method, which is used to solve the problem that the prior art cannot provide a drive output method, which can ensure a smaller chip circuit Area and power consumption, and at the same time, the reliability of I / O gate oxide and the function of power loss and leakage prevention can be taken into account under various circumstances.

Method used

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  • Driving output circuit, chip and driving output method
  • Driving output circuit, chip and driving output method
  • Driving output circuit, chip and driving output method

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Embodiment Construction

[0043] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.

[0044] It should be noted that the diagrams provided in the following embodiments are only schematically illustrating the basic ideas of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and number of componen...

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Abstract

The invention provides a driving output circuit, a chip and a driving output method. The driving output circuit comprises a timing module which is used for outputting a timing signal; a bootstrap module which is used for generating a first conduction voltage according to an input signal; a charge pump module which is used for generating a second conduction voltage according to the timing signal; and a driving module which comprises an upper driving tube and a lower driving tube connected with the upper driving tube, wherein the connecting point of the upper driving tube and the lower driving tube is a signal output end. The first conduction voltage and the second conduction voltage are both used for conducting the upper driving tube and / or the lower driving tube, so that the signal output end outputs an output signal. The invention provides a dynamic hybrid driving output circuit which can give consideration to gate-oxide reliability and a power-loss anti-creeping function at the same time.

Description

technical field [0001] The invention relates to an integrated circuit, in particular to a driving output circuit, a chip and a driving output method. Background technique [0002] With the development of electronic equipment systems, chips using different processes and power supply voltages are used in one system at the same time, and they need to follow the communication protocol to complete the exchange of information with each other. In some cases, chips need to be compatible with different communication protocols. For example, the chip supports the I3C protocol to increase the transmission speed of the system, and the chip also needs to be compatible with the I2C protocol so that it can communicate with chips that only support I2C. Therefore, a new requirement is put forward for the I / O design of the chip: the I / O power supply voltage should be lower than the core power supply voltage of the chip, the bus should be able to support a level several times higher than the I...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185
CPCH03K19/0185H03K19/20H03K19/01H03K19/0175H03K3/012H03K17/6872H03K2217/0063H03K2217/0072
Inventor 胡宗杰顾宇非陈磊
Owner MONTAGE TECH KUNSHAN CO LTD
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