Three-phase grid-connected software phase-locked loop based on cascaded filter

Abstract

The invention discloses a three-phase grid-connected software phase-locked loop based on a cascaded filter, and belongs to the related technical field of power grid voltage phase signal detection and extraction. Aiming at the problem that a three-phase power grid harmonic component may cause the reduction of the accuracy of a traditional software phase-locked loop and further affects the control performance of grid-connected equipment, the traditional three-phase grid-connected software phase-locked loop is improved, and a cascade filter capable of eliminating a three-phase voltage direct-current offset voltage component and a main sub-harmonic voltage component at the same time is introduced. Therefore, the method has the advantages of high phase locking precision, good dynamic convergence performance, strong harmonic filtering capability and the like. The method is mainly used for phase detection under the condition that the power grid voltage is mixed with the direct-current offset voltage and the harmonic voltage.

Description

technical field [0001] The invention relates to the technical field of grid voltage phase detection and harmonic suppression, in particular to a three-phase grid-connected software phase-locked loop based on a cascaded filter. Background technique [0002] Grid synchronization plays an important role in grid-connected inverters, which are usually implemented by phase-locked loops. Accurate phase-locking results can not only reduce the total harmonic distortion, but also improve the waveform quality of the grid current, thereby ensuring that the grid current is in phase with the grid voltage, thereby improving the stability of the grid-connected system. However, software PLL performance can suffer from major power quality issues in grid-connected systems, such as voltage waveform distortion, harmonics, voltage frequency variation, etc. Therefore, in recent years, the realization of precise phase-locking under non-ideal grid voltage conditions has become a hotspot in the rese...

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Problems solved by technology

However, when the grid voltage contains a DC offset, SOGI-PLL will produce errors in the extraction of the positive sequence component of the voltage fundamental wave, resulting in inaccurate phase-locked results of the phase-locked loop

[0004] In addition, the existence of harmonic voltage in the grid voltage will cause waveform oscillation in the phase and frequency values ​​estimated by the phase-locked loop, which will affect the accuracy of phase-locking. Therefore, effectively filtering the harmonic voltage in the grid voltage is also a hot spot in the research of phase-locked loops.

Some scholars propose to use a cascaded delayed signal canceling operator (DSC) to eliminate each harmonic voltage in the power grid, but a large number of cascaded DSCs will affect the dynamic response speed of the phase-locked loop

Some scholars have proposed that the moving average filter (MAF) is used to eliminate the harmonic components in the PLL input, but the simple MAF method eliminates the negative sequence component of the fundamental voltage of the power grid, and at the same time, it will also lead to the disadvantages of slow dynamic convergence time.

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