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Self-adaptive dynamic zero compensation circuit applied to LDO

A dynamic zero and compensation circuit technology, applied in the direction of adjusting electrical variables, instruments, control/regulating systems, etc., can solve the problems that the dynamic zero compensation circuit cannot follow, load capacitance changes, etc., to avoid output oscillation, improve response speed, and ensure The effect of loop stability

Active Publication Date: 2021-10-01
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Aiming at the problem that the traditional dynamic zero compensation circuit cannot follow the change of load capacitance, the present invention proposes an adaptive dynamic zero compensation circuit applied to LDO

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  • Self-adaptive dynamic zero compensation circuit applied to LDO
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  • Self-adaptive dynamic zero compensation circuit applied to LDO

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Embodiment Construction

[0018] Below in conjunction with accompanying drawing, technical solution of the present invention is described in detail:

[0019] Such as figure 1 As shown, the present invention proposes an adaptive dynamic zero point compensation circuit applied to LDO, and the power transistor adopts a PMOS power transistor. Such as figure 1 As shown, including error amplifier (Error Amplifier), sampling circuit (Sense Circuit), PMOS power transistor, voltage divider network (Voltage Divider network).

[0020] The error amplifier is a traditional five-tube operational amplifier; the sampling circuit is used to sample the power tube current, and at the same time, the sampling current and the output current are superimposed to form a dynamic zero point that can follow the change of the output pole; the power tube is a PMOS power tube. To provide current for the load, while the PMOD power tube has a small dropout voltage, and the conduction loss is small when the load is large; the resisto...

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Abstract

The invention belongs to the technical field of analog circuit power management, and particularly relates to a self-adaptive dynamic zero compensation circuit applied to an LDO. A compensation zero point related to an output pole is formed at a feedback point through two active current paths, and the two currents are an output current and an output sampling current respectively. Due to the fact that the output current can pass through the load impedance when superposed with the output sampling current, a current path related to the output current can contain information of the load impedance, and a compensation zero point related to an output pole can be formed after the two current branches are superposed. The compensation zero point not only contains the information of the output resistance, but also contains the information of the output capacitance, so that when the output capacitance changes, the compensation zero point can change along with the output pole at the same time, and the stability of the loop is ensured. And meanwhile, the problem that the response speed is reduced due to overcompensation of the circuit under the heavy load condition is solved.

Description

technical field [0001] The invention belongs to the technical field of analog circuit power management, and in particular relates to an adaptive dynamic zero point compensation circuit applied to an LDO. Background technique [0002] A low dropout regulator (LDO) is a very important module in the field of power management circuits, and its function is to convert an external power supply voltage into a lower and more stable voltage. When the load changes, the LDO can automatically adjust the output current of the power tube to keep the output voltage at a stable value. [0003] LDOs can be divided into NMOS LDOs and PMOS LDOs according to whether the power transistors used are NMOS power transistors or PMOS power transistors. In order to ensure that the power tube still has a certain gate-source voltage when the input-output voltage difference is small, the NMOS LDO needs to add an additional charge pump circuit to increase the gate voltage of the NMOS power tube, which will...

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Application Information

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IPC IPC(8): G05F1/46G05F1/575
CPCG05F1/462G05F1/575
Inventor 周泽坤王世杰李世磊王卓张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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