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Preparation method of trench isolation structure and preparation method of semiconductor device

A trench isolation and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problem of weakened isolation effect

Pending Publication Date: 2021-10-19
CHANGXIN MEMORY TECH INC
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] Based on this, the present application aims at the technical problem that polysilicon film compensation technology will remain at the bottom of the trench when the trench isolation structure is prepared and the isolation effect will be weakened, and proposes a method for preparing a trench isolation structure and a semiconductor device. method

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  • Preparation method of trench isolation structure and preparation method of semiconductor device
  • Preparation method of trench isolation structure and preparation method of semiconductor device
  • Preparation method of trench isolation structure and preparation method of semiconductor device

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preparation example Construction

[0043] The present application relates to a method for preparing a trench isolation structure, and the method for preparing a trench isolation structure at least includes the following steps:

[0044] A trench is opened on the substrate, and the bottom of the trench is filled with a first dielectric layer with a preset thickness.

[0045] A compensation film is formed on the sidewall of the trench above the first dielectric layer.

[0046] A second dielectric layer is filled in the trench to form the trench isolation structure, and the compensation film is completely consumed during the process of filling the second dielectric layer.

[0047] It should be noted that the preset thickness of the first dielectric layer can be set according to the thickness of the compensation film. For example, the filling height of the compensation film remaining at the bottom of the trench in the traditional technology can be obtained first. The preset thickness of the first dielectric layer is...

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Abstract

The invention relates to a preparation method of a trench isolation structure and a preparation method of a semiconductor device. The preparation method of the trench isolation structure comprises the steps of forming a trench in a substrate, and filling the bottom of the trench with a first dielectric layer with a preset thickness, forming a compensation film on the side wall of the groove above the first dielectric layer, and filling a second dielectric layer in the groove to form a groove isolation structure, and enabling the compensation film to be completely consumed after being filled with the second dielectric layer. The thin film compensation technology is introduced, the loss of the active region in cleaning, thermal oxidation and other processes can be reduced, and meanwhile, the compensation film is not formed at the bottom of the groove, so that the phenomenon that the compensation film in the narrow region at the bottom of the groove is difficult to consume to cause residues can be avoided.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for preparing a trench isolation structure and a method for preparing a semiconductor device. Background technique [0002] Semiconductor devices need to form trench isolation structures to achieve isolation of adjacent active regions. In a specific process, after trenches are opened on the substrate, processes such as cleaning, thermal oxidation, and atomic layer deposition (ALD) are generally performed. In order to reduce the loss of the size of the active region in the above process, polysilicon film compensation technology is generally introduced, that is, after opening the trench, a layer of polysilicon film is formed on the inner wall of the trench. Oxidation, atomic layer deposition (ALD) and other processes are consumed, thereby reducing the loss of the size of the active region. [0003] However, in the actual use of polysilicon film compensation technology, when...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L27/108
CPCH01L21/76224H10B12/30H01L21/76227H01L21/76229H10B12/00
Inventor 徐陈明车范锡关文婧
Owner CHANGXIN MEMORY TECH INC
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