Successive approximation analog-to-digital converter with digital calibration

Abstract

The invention belongs to the technical field of digital-to-analog conversion, and discloses a successive approximation analog-to-digital converter with digital calibration, which is characterized by comprising a comparator, the positive end of the comparator is connected with the output end of a sectional DAC (Digital-to-Analog Converter), and the negative end of the comparator is connected with an analog input quantity through a sampling / holding circuit; the output end of the successive approximation analog-to-digital converter is connected with the input end of the successive approximation circuit and the input end of the digital calibration circuit, the output end of the successive approximation circuit is connected with the input end of the digital calibration circuit, the output end of the successive approximation circuit and the output end of the digital calibration circuit are connected with the summator, and the output of the summator is the digital output quantity of the successive approximation analog-to-digital converter. The digital calibration circuit is used for mapping K-time results with 1 appearing in M-time trigger results of the comparator to a probability estimation model of a voltage margin and outputting a digital calibration code, and a voltage margin function obtained based on the probability estimation model is as follows: G and B are constants, M is the number of comparison times, and D [N] i is the output result of the comparator each time.

Description

technical field [0001] The invention relates to the technical field of digital-to-analog conversion, in particular to a successive approximation analog-to-digital converter with digital calibration. Background technique [0002] The analog-to-digital converter (ADC) is the interface between the analog front-end and the digital processing unit. Its resolution and area are important design considerations. The latest successive approximation register ADC provides a medium-resolution (<12- bit) for power-saving solutions (<10fJ / conversion step). [0003] As resolution increases, the input load capacitance and area of ​​traditional binary-weighted Digital-to-Analog Converter (DAC) arrays in successive-approximation-register ADCs explode exponentially, allowing more than 12-bit resolution Good capacitor matching becomes more difficult, resulting in a decrease in the effective resolution of the analog-to-digital converter. To achieve high precision with low area overhead an...

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Problems solved by technology

[0008] Among the three methods, the first two methods modify the structure of the analog-to-digital converter and have a large time cost. The digital calibration method based on the probability model is portable, does not affect the structure of the analog-to-digital converter, and has the characteristics of fast speed. However, the traditional The range of voltage margin estimates obtained by digital calibration techniques based on probability models is fixed and has nothing to do with resolution, which limits the estimation accuracy of residues. Therefore, we urgently need to design a new type of successive approximation analog-to-digital converter to overcome the above problems

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