Processor, logic chip and method for binarizing convolutional neural network

Abstract

A processor (200) for implementing a binarized convolutional neural network (BCNN). The processor (200) includes a shared logic module (220) capable of performing binarized convolution operations and downsampling operations. The shared logic module (220) is switchable between a convolution mode and a downsampling mode by adjusting parameters (224) of the shared logic module (220). The processor (200) may be a logic chip.

Description

Background technique [0001] The present invention is related to neural network technology. A neural network is a machine learning model that takes input data and processes it through one or more neural network layers to produce an output such as classification or decision making. The output of each neural network layer will be further processed as the input of the next neural network layer. Those layers between the input and output layers of the overall neural network are called hidden layers. [0002] A convolutional neural network is a class of neural networks built from one or more convolutional layers that perform convolutional functions. Convolutional neural networks are used in many fields, including but not limited to, image and video recognition, image and video classification, sound recognition and classification, facial recognition, medical data analysis, natural language processing, user preference prediction, time series prediction and analysis Wait. [0003] I...

AI Technical Summary

Problems solved by technology

[0003] In general, convolutional neural networks with a large number of unit layers tend to have better performance, but at the same time have higher requirements for memory and computing resources

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