Anti-fuse memory cell state detection circuit and memory
A storage unit and state detection technology, applied in the field of memory and anti-fuse storage unit state detection circuits, can solve the problems of inaccurate storage state detection results, and achieve the effects of avoiding storage state misjudgments, accurate detection results, and precise control.
Pending Publication Date: 2022-01-18
CHANGXIN MEMORY TECH INC
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Problems solved by technology
[0005] The purpose of the present disclosure is to provide an anti-fuse memory unit state detection circuit and a memory using the circuit, which are used to overcome the storage state detection of anti-fuse memory cells caused by the limitations and defects of related technologies at least to a certain extent The problem with inaccurate results
Method used
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[0037] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of the specific details being omitted, or other methods, components, devices, steps, etc. may be adopted. In other instances, well-known technical solution...
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The invention provides an anti-fuse memory cell state detection circuit and a memory, and the circuit comprises: a first current module, wherein the first end of which is connected with an anti-fuse memory cell array through a first node, the second end of which is connected with a second node, the first current module is used for outputting a detection current through the second node, and the detection current is related to the resistance value of a to-be-detected anti-fuse memory cell in the anti-fuse memory cell array; a second current module, wherein the first end of the second current module is connected with the first end of the reference resistor through a third node, the second end is connected with a fourth node, the second end of the reference resistor is grounded, the second current module is used for outputting reference current through the fourth node, and the reference current is related to the resistance value of the reference resistor; and a comparator, wherein the first input end of the comparator is connected with the second node, the second input end of the comparator is connected with the fourth node, and the comparator is used for detecting the storage state of the to-be-detected anti-fuse storage unit. According to the embodiment of the invention, the detection accuracy of the storage state of the anti-fuse storage unit can be improved.
Description
technical field [0001] The present disclosure relates to the technical field of integrated circuits, in particular to an anti-fuse memory unit state detection circuit and a memory using the circuit. Background technique [0002] One-time programmable memory (One time programmable, OTP) is widely used in various types of memory, and is used to realize redundant replacement of damaged memory cells, fine-tuning of circuit modules, and the like. The commonly used one-time programmable memory uses the breakdown or non-breakdown state of the antifuse memory cell to store information. [0003] Usually, the breakdown state of the anti-fuse memory cell is detected only through a simple logic gate circuit (such as an inverter, etc.). In the related art, an inverter is used to detect the breakdown state of the antifuse memory cell, such as figure 1 shown. If the antifuse memory unit 11 to be tested is in the state of being programmed and broken down, the path resistance will be rela...
Claims
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Login to View More IPC IPC(8): G11C17/18G11C29/50G11C17/16H01L27/112
CPCG11C17/18G11C29/50G11C17/16G11C17/165G11C2029/5004H10B20/20H10B20/00
Inventor 季汝敏
Owner CHANGXIN MEMORY TECH INC