FPGA code stream data compression and decompression method

A compression method and decompression technology, applied in the field of FPGA applications, can solve problems such as the inability to reduce configuration time, reduce storage size and data transmission time, and reduce compression rate, so as to reduce the possibility of being cracked, improve configuration efficiency, and improve configuration speed effect

Pending Publication Date: 2022-02-18
EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] (1) When there is most of the repeated content in the code stream, it is necessary to generate a compressed code every fixed number of bytes, which reduces the compression rate
[0010] (2) Only the storage size and data transmission time can be reduced, but the configuration time cannot be reduced

Method used

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  • FPGA code stream data compression and decompression method
  • FPGA code stream data compression and decompression method
  • FPGA code stream data compression and decompression method

Examples

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Embodiment 1

[0036] Such as image 3 As shown, the compression method of the FPGA code stream data of the present embodiment comprises the following steps:

[0037] Step 1. Obtain the location of the code stream data to be compressed in the device;

[0038] Step 2, analyzing the position of the entire code stream data to be compressed in the device, and dividing the code stream data to be compressed into multiple data blocks in line units according to the position;

[0039] Step 3: The data blocks are compressed according to two cases: all the data in each row are the same and some data in each row are different.

[0040] In this embodiment, the specific method for compressing the data block is divided into two cases where the data in each row is all the same and the data in each row is different as described in step 3:

[0041] Analyze whether the data of each row of data blocks is all the same. When the data of each row of data blocks is all the same, the method of skipping the entire ...

Embodiment 2

[0047] Such as Figure 4 As shown, the decompression method of the FPGA code stream data of the present embodiment, the method is: whether to enable full compression or segmented partial compression in the analysis code stream data, when enabling full compression, adopt the partial decompression method to decompress Compression; when segmented partial compression is enabled, the segmented partial decompression method is used for decompression;

[0048] Among them, the method of decompressing by using the partial decompression method is: analyzing the keyword representing one row data block and the keywords representing several row data blocks in the code stream data, and controlling the configuration according to the keyword and the decompression protocol. skipped addresses and data;

[0049] Wherein, the decompression method using segmented partial decompression method is: parsing some special keywords in the code stream data, and configuring corresponding data and addresses...

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Abstract

The invention discloses an FPGA code stream data compression and decompression method. The compression method comprises the following steps: 1, acquiring the position of to-be-compressed code stream data in equipment; 2, analyzing the position of the whole to-be-compressed code stream data in the equipment, and dividing the to-be-compressed code stream data into a plurality of data blocks by taking a row as a unit according to the position; 3, compressing the data blocks under two conditions that all rows of data are the same and individual data in each row of data are different; the decompression method comprises the following steps: analyzing whether full compression or segmented partial compression is enabled in code stream data, and when full compression is enabled, performing decompression by adopting a partial decompression method; and when the segmented partial compression is enabled, adopting a segmented partial decompression method for decompression. According to the method, the compression rate of the code stream data with high repetition rate is higher, less resources can be occupied, the configuration efficiency is greatly improved, and a user circuit can be further kept secret.

Description

technical field [0001] The invention belongs to the field of FPGA application technology, and in particular relates to a method for compressing and decompressing FPGA code stream data. Background technique [0002] In recent years, with the emergence of large-scale and high-performance FPGAs, as well as the improvement of software and hardware design processes and design methods, reconfigurable systems based on FPGAs have gradually become a new hotspot in the field of computer systems. The hardware information in the FPGA-based reconfigurable system, that is, the configuration information of the FPGA, can be modified or dynamically invoked like software by using advanced EDA tools, so that the system has the high performance of hardware computing and also Combined with the high flexibility that software has. [0003] Using a reconfigurable system to implement a calculation logic, its running overhead includes two parts: the first is the calculation time, that is, the time u...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M7/30
CPCH03M7/30
Inventor 徐浩然夏金军
Owner EHIWAY MICROELECTRONIC SCI & TECH SUZHOU CO LTD
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