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Multi-core task scheduling method and device, electronic equipment and storage medium

A scheduling method and task technology, applied in the direction of multi-program device, program control design, electrical digital data processing, etc., can solve the problem of multi-core processing performance degradation, etc., to achieve the effect of reducing redundant scheduling and avoiding preemption

Active Publication Date: 2022-03-11
科东(广州)软件科技有限公司
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Embodiments of the present application provide a task multi-core scheduling method, device, electronic equipment, and storage medium, so as to avoid the problem of multi-core processing performance degradation that may occur during task preemption

Method used

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  • Multi-core task scheduling method and device, electronic equipment and storage medium
  • Multi-core task scheduling method and device, electronic equipment and storage medium
  • Multi-core task scheduling method and device, electronic equipment and storage medium

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Embodiment 1

[0025] figure 1 It is a schematic flowchart of the method for multi-core scheduling of tasks provided in Embodiment 1 of the present application. This embodiment is applicable to the scenario of multi-core scheduling of tasks. The method can be performed by a task multi-core scheduling device, which can be implemented in the form of hardware and / or software, and generally can be integrated in electronic equipment such as computers with data computing capabilities, specifically comprising the following steps:

[0026] Step 101, filter out the target running tasks with the lowest priority in the running task queue and whose running CPU core does not have the second-priority preemption attribute; wherein, the second-priority preemption attribute is used to indicate that the CPU core has an affinity attribute with the CPU core Global tasks.

[0027] It should be noted that before this step, the scheduler will initiate scheduling. In order to ensure that the method of this embodim...

Embodiment 2

[0051] image 3 It is a schematic structural diagram of a task multi-core scheduling device provided in Embodiment 2 of the present application. The task multi-core scheduling device provided in the embodiment of the present application can execute the task multi-core scheduling method provided in any embodiment of the present application, and has corresponding functional modules and beneficial effects of the execution method. The device can be implemented in software and / or hardware, such as image 3 As shown, the task multi-core scheduling device specifically includes: a target running task determination module 301 , a preemption right determination module 302 , and a candidate task preemption module 303 .

[0052] Among them, the target running task determination module is used to filter out the target running tasks with the lowest priority in the running task queue and the running CPU core does not have the second-priority preemption attribute; wherein, the second-priorit...

Embodiment 3

[0078] Figure 4 A schematic structural diagram of an electronic device provided in Embodiment 3 of the present application, such as Figure 4 As shown, the electronic device includes a processor 410, a memory 420, an input device 430, and an output device 440; the number of processors 410 in the electronic device may be one or more, Figure 4 Take a processor 410 as an example; the processor 410, memory 420, input device 430 and output device 440 in the electronic device can be connected by bus or other methods, Figure 4 Take connection via bus as an example.

[0079] The memory 420, as a computer-readable storage medium, can be used to store software programs, computer-executable programs and modules, such as program instructions / modules corresponding to the multi-core scheduling method for tasks in the embodiment of the present invention (for example, a multi-core scheduling device for tasks Scheduling prohibition module 401, task preemption module 402, task switching mo...

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Abstract

The embodiment of the invention discloses a multi-core task scheduling method and device, electronic equipment and a storage medium. The method comprises the following steps: screening out a target running task with the lowest priority in a running task queue, wherein a running CPU core of the target running task does not have a sub-priority preemption attribute; wherein the secondary priority preemptive attribute is used for indicating the CPU core to check a global task which has affinity attribute with the CPU core; a target ready task with the highest priority is screened out from the ready tasks, and if the priority of the target ready task is higher than that of the target running task, it is determined that the target ready task has the preemption right; if the target ready task has the preemption right, determining a candidate task of a CPU core operated by the target operation task, and preempting the candidate task by using the target ready task based on the priority of the target ready task and the candidate task; wherein the candidate tasks are tasks which have been put into the CPU core for operation or are about to be put into the CPU core for operation.

Description

technical field [0001] The embodiments of the present application relate to the technical field of task scheduling, and in particular, to a task multi-core scheduling method, device, electronic device, and storage medium. Background technique [0002] With the development of chip technology, the application of chips is more and more extensive. In order to improve the performance of the chip, multiple processing cores will be set in the chip. Each core can be independently assigned to each task and process each task at the same time. Compared with single-core chips, the efficiency of processing tasks is greatly improved. [0003] In the scenario of multiple processing cores, the scheduler is usually used to implement task scheduling among the cores, so as to ensure that the task processing processes among the multiple cores do not conflict. In a real-time system, task switching is strictly controlled by task priority. Generally, high-priority tasks can preempt the CPU usage ...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F9/48
CPCG06F9/505G06F9/4881
Inventor 王洋彭元志程茂
Owner 科东(广州)软件科技有限公司
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